diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c index 5e8344fdfc28..83778a6ff007 100644 --- a/drivers/gpu/drm/i915/display/i9xx_plane.c +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c @@ -7,9 +7,10 @@ #include #include #include +#include -#include "i915_drv.h" #include "i915_reg.h" +#include "i915_utils.h" #include "i9xx_plane.h" #include "i9xx_plane_regs.h" #include "intel_atomic.h" @@ -631,92 +632,84 @@ static void bdw_primary_enable_flip_done(struct intel_plane *plane) { struct intel_display *display = to_intel_display(plane); - struct drm_i915_private *i915 = to_i915(plane->base.dev); enum pipe pipe = plane->pipe; - spin_lock_irq(&i915->irq_lock); + spin_lock_irq(&display->irq.lock); bdw_enable_pipe_irq(display, pipe, GEN8_PIPE_PRIMARY_FLIP_DONE); - spin_unlock_irq(&i915->irq_lock); + spin_unlock_irq(&display->irq.lock); } static void bdw_primary_disable_flip_done(struct intel_plane *plane) { struct intel_display *display = to_intel_display(plane); - struct drm_i915_private *i915 = to_i915(plane->base.dev); enum pipe pipe = plane->pipe; - spin_lock_irq(&i915->irq_lock); + spin_lock_irq(&display->irq.lock); bdw_disable_pipe_irq(display, pipe, GEN8_PIPE_PRIMARY_FLIP_DONE); - spin_unlock_irq(&i915->irq_lock); + spin_unlock_irq(&display->irq.lock); } static void ivb_primary_enable_flip_done(struct intel_plane *plane) { struct intel_display *display = to_intel_display(plane); - struct drm_i915_private *i915 = to_i915(plane->base.dev); - spin_lock_irq(&i915->irq_lock); + spin_lock_irq(&display->irq.lock); ilk_enable_display_irq(display, DE_PLANE_FLIP_DONE_IVB(plane->i9xx_plane)); - spin_unlock_irq(&i915->irq_lock); + spin_unlock_irq(&display->irq.lock); } static void ivb_primary_disable_flip_done(struct intel_plane *plane) { struct intel_display *display = to_intel_display(plane); - struct drm_i915_private *i915 = to_i915(plane->base.dev); - spin_lock_irq(&i915->irq_lock); + spin_lock_irq(&display->irq.lock); ilk_disable_display_irq(display, DE_PLANE_FLIP_DONE_IVB(plane->i9xx_plane)); - spin_unlock_irq(&i915->irq_lock); + spin_unlock_irq(&display->irq.lock); } static void ilk_primary_enable_flip_done(struct intel_plane *plane) { struct intel_display *display = to_intel_display(plane); - struct drm_i915_private *i915 = to_i915(plane->base.dev); - spin_lock_irq(&i915->irq_lock); + spin_lock_irq(&display->irq.lock); ilk_enable_display_irq(display, DE_PLANE_FLIP_DONE(plane->i9xx_plane)); - spin_unlock_irq(&i915->irq_lock); + spin_unlock_irq(&display->irq.lock); } static void ilk_primary_disable_flip_done(struct intel_plane *plane) { struct intel_display *display = to_intel_display(plane); - struct drm_i915_private *i915 = to_i915(plane->base.dev); - spin_lock_irq(&i915->irq_lock); + spin_lock_irq(&display->irq.lock); ilk_disable_display_irq(display, DE_PLANE_FLIP_DONE(plane->i9xx_plane)); - spin_unlock_irq(&i915->irq_lock); + spin_unlock_irq(&display->irq.lock); } static void vlv_primary_enable_flip_done(struct intel_plane *plane) { struct intel_display *display = to_intel_display(plane); - struct drm_i915_private *i915 = to_i915(plane->base.dev); enum pipe pipe = plane->pipe; - spin_lock_irq(&i915->irq_lock); + spin_lock_irq(&display->irq.lock); i915_enable_pipestat(display, pipe, PLANE_FLIP_DONE_INT_STATUS_VLV); - spin_unlock_irq(&i915->irq_lock); + spin_unlock_irq(&display->irq.lock); } static void vlv_primary_disable_flip_done(struct intel_plane *plane) { struct intel_display *display = to_intel_display(plane); - struct drm_i915_private *i915 = to_i915(plane->base.dev); enum pipe pipe = plane->pipe; - spin_lock_irq(&i915->irq_lock); + spin_lock_irq(&display->irq.lock); i915_disable_pipestat(display, pipe, PLANE_FLIP_DONE_INT_STATUS_VLV); - spin_unlock_irq(&i915->irq_lock); + spin_unlock_irq(&display->irq.lock); } static bool i9xx_plane_can_async_flip(u64 modifier) diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h index 577eece30f46..b4937e102360 100644 --- a/drivers/gpu/drm/i915/display/intel_display_core.h +++ b/drivers/gpu/drm/i915/display/intel_display_core.h @@ -179,7 +179,7 @@ struct intel_hotplug { /* * Queuing of hotplug_work, reenable_work and poll_init_work is - * enabled. Protected by drm_i915_private::irq_lock. + * enabled. Protected by intel_display::irq::lock. */ bool detection_work_enabled; @@ -456,6 +456,9 @@ struct intel_display { } ips; struct { + /* protects the irq masks */ + spinlock_t lock; + /* * Most platforms treat the display irq block as an always-on * power domain. vlv/chv can disable it at runtime and need diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c index 264ddeba121b..3e73832e5e81 100644 --- a/drivers/gpu/drm/i915/display/intel_display_irq.c +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c @@ -135,7 +135,7 @@ void ilk_update_display_irq(struct intel_display *display, struct drm_i915_private *dev_priv = to_i915(display->drm); u32 new_val; - lockdep_assert_held(&dev_priv->irq_lock); + lockdep_assert_held(&display->irq.lock); drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask); new_val = dev_priv->irq_mask; @@ -173,7 +173,7 @@ void bdw_update_port_irq(struct intel_display *display, u32 new_val; u32 old_val; - lockdep_assert_held(&dev_priv->irq_lock); + lockdep_assert_held(&display->irq.lock); drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask); @@ -206,7 +206,7 @@ static void bdw_update_pipe_irq(struct intel_display *display, struct drm_i915_private *dev_priv = to_i915(display->drm); u32 new_val; - lockdep_assert_held(&dev_priv->irq_lock); + lockdep_assert_held(&display->irq.lock); drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask); @@ -254,7 +254,7 @@ void ibx_display_interrupt_update(struct intel_display *display, drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask); - lockdep_assert_held(&dev_priv->irq_lock); + lockdep_assert_held(&display->irq.lock); if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv))) return; @@ -276,11 +276,10 @@ void ibx_disable_display_interrupt(struct intel_display *display, u32 bits) u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe) { - struct drm_i915_private *dev_priv = to_i915(display->drm); u32 status_mask = display->irq.pipestat_irq_mask[pipe]; u32 enable_mask = status_mask << 16; - lockdep_assert_held(&dev_priv->irq_lock); + lockdep_assert_held(&display->irq.lock); if (DISPLAY_VER(display) < 5) goto out; @@ -329,7 +328,7 @@ void i915_enable_pipestat(struct intel_display *display, "pipe %c: status_mask=0x%x\n", pipe_name(pipe), status_mask); - lockdep_assert_held(&dev_priv->irq_lock); + lockdep_assert_held(&display->irq.lock); drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)); if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == status_mask) @@ -353,7 +352,7 @@ void i915_disable_pipestat(struct intel_display *display, "pipe %c: status_mask=0x%x\n", pipe_name(pipe), status_mask); - lockdep_assert_held(&dev_priv->irq_lock); + lockdep_assert_held(&display->irq.lock); drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)); if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == 0) @@ -380,22 +379,20 @@ static bool i915_has_legacy_blc_interrupt(struct intel_display *display) /* enable ASLE pipestat for OpRegion */ static void i915_enable_asle_pipestat(struct intel_display *display) { - struct drm_i915_private *dev_priv = to_i915(display->drm); - if (!intel_opregion_asle_present(display)) return; if (!i915_has_legacy_blc_interrupt(display)) return; - spin_lock_irq(&dev_priv->irq_lock); + spin_lock_irq(&display->irq.lock); i915_enable_pipestat(display, PIPE_B, PIPE_LEGACY_BLC_EVENT_STATUS); if (DISPLAY_VER(display) >= 4) i915_enable_pipestat(display, PIPE_A, PIPE_LEGACY_BLC_EVENT_STATUS); - spin_unlock_irq(&dev_priv->irq_lock); + spin_unlock_irq(&display->irq.lock); } #if IS_ENABLED(CONFIG_DEBUG_FS) @@ -514,14 +511,13 @@ static void i9xx_pipestat_irq_reset(struct intel_display *display) void i9xx_pipestat_irq_ack(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]) { - struct drm_i915_private *dev_priv = to_i915(display->drm); enum pipe pipe; - spin_lock(&dev_priv->irq_lock); + spin_lock(&display->irq.lock); if ((display->platform.valleyview || display->platform.cherryview) && !display->irq.vlv_display_irqs_enabled) { - spin_unlock(&dev_priv->irq_lock); + spin_unlock(&display->irq.lock); return; } @@ -576,7 +572,7 @@ void i9xx_pipestat_irq_ack(struct intel_display *display, intel_de_write(display, reg, enable_mask); } } - spin_unlock(&dev_priv->irq_lock); + spin_unlock(&display->irq.lock); } void i915_pipestat_irq_handler(struct intel_display *display, @@ -1566,13 +1562,12 @@ void i915gm_irq_cstate_wa(struct intel_display *display, bool enable) int i8xx_enable_vblank(struct drm_crtc *crtc) { struct intel_display *display = to_intel_display(crtc->dev); - struct drm_i915_private *dev_priv = to_i915(crtc->dev); enum pipe pipe = to_intel_crtc(crtc)->pipe; unsigned long irqflags; - spin_lock_irqsave(&dev_priv->irq_lock, irqflags); + spin_lock_irqsave(&display->irq.lock, irqflags); i915_enable_pipestat(display, pipe, PIPE_VBLANK_INTERRUPT_STATUS); - spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); + spin_unlock_irqrestore(&display->irq.lock, irqflags); return 0; } @@ -1580,13 +1575,12 @@ int i8xx_enable_vblank(struct drm_crtc *crtc) void i8xx_disable_vblank(struct drm_crtc *crtc) { struct intel_display *display = to_intel_display(crtc->dev); - struct drm_i915_private *dev_priv = to_i915(crtc->dev); enum pipe pipe = to_intel_crtc(crtc)->pipe; unsigned long irqflags; - spin_lock_irqsave(&dev_priv->irq_lock, irqflags); + spin_lock_irqsave(&display->irq.lock, irqflags); i915_disable_pipestat(display, pipe, PIPE_VBLANK_INTERRUPT_STATUS); - spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); + spin_unlock_irqrestore(&display->irq.lock, irqflags); } int i915gm_enable_vblank(struct drm_crtc *crtc) @@ -1610,14 +1604,13 @@ void i915gm_disable_vblank(struct drm_crtc *crtc) int i965_enable_vblank(struct drm_crtc *crtc) { struct intel_display *display = to_intel_display(crtc->dev); - struct drm_i915_private *dev_priv = to_i915(crtc->dev); enum pipe pipe = to_intel_crtc(crtc)->pipe; unsigned long irqflags; - spin_lock_irqsave(&dev_priv->irq_lock, irqflags); + spin_lock_irqsave(&display->irq.lock, irqflags); i915_enable_pipestat(display, pipe, PIPE_START_VBLANK_INTERRUPT_STATUS); - spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); + spin_unlock_irqrestore(&display->irq.lock, irqflags); return 0; } @@ -1625,28 +1618,26 @@ int i965_enable_vblank(struct drm_crtc *crtc) void i965_disable_vblank(struct drm_crtc *crtc) { struct intel_display *display = to_intel_display(crtc->dev); - struct drm_i915_private *dev_priv = to_i915(crtc->dev); enum pipe pipe = to_intel_crtc(crtc)->pipe; unsigned long irqflags; - spin_lock_irqsave(&dev_priv->irq_lock, irqflags); + spin_lock_irqsave(&display->irq.lock, irqflags); i915_disable_pipestat(display, pipe, PIPE_START_VBLANK_INTERRUPT_STATUS); - spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); + spin_unlock_irqrestore(&display->irq.lock, irqflags); } int ilk_enable_vblank(struct drm_crtc *crtc) { struct intel_display *display = to_intel_display(crtc->dev); - struct drm_i915_private *dev_priv = to_i915(crtc->dev); enum pipe pipe = to_intel_crtc(crtc)->pipe; unsigned long irqflags; u32 bit = DISPLAY_VER(display) >= 7 ? DE_PIPE_VBLANK_IVB(pipe) : DE_PIPE_VBLANK(pipe); - spin_lock_irqsave(&dev_priv->irq_lock, irqflags); + spin_lock_irqsave(&display->irq.lock, irqflags); ilk_enable_display_irq(display, bit); - spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); + spin_unlock_irqrestore(&display->irq.lock, irqflags); /* Even though there is no DMC, frame counter can get stuck when * PSR is active as no frames are generated. @@ -1660,15 +1651,14 @@ int ilk_enable_vblank(struct drm_crtc *crtc) void ilk_disable_vblank(struct drm_crtc *crtc) { struct intel_display *display = to_intel_display(crtc->dev); - struct drm_i915_private *dev_priv = to_i915(crtc->dev); enum pipe pipe = to_intel_crtc(crtc)->pipe; unsigned long irqflags; u32 bit = DISPLAY_VER(display) >= 7 ? DE_PIPE_VBLANK_IVB(pipe) : DE_PIPE_VBLANK(pipe); - spin_lock_irqsave(&dev_priv->irq_lock, irqflags); + spin_lock_irqsave(&display->irq.lock, irqflags); ilk_disable_display_irq(display, bit); - spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); + spin_unlock_irqrestore(&display->irq.lock, irqflags); } static bool gen11_dsi_configure_te(struct intel_crtc *intel_crtc, @@ -1707,7 +1697,6 @@ int bdw_enable_vblank(struct drm_crtc *_crtc) { struct intel_crtc *crtc = to_intel_crtc(_crtc); struct intel_display *display = to_intel_display(crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; unsigned long irqflags; @@ -1717,9 +1706,9 @@ int bdw_enable_vblank(struct drm_crtc *_crtc) if (crtc->vblank_psr_notify && display->irq.vblank_enable_count++ == 0) schedule_work(&display->irq.vblank_notify_work); - spin_lock_irqsave(&dev_priv->irq_lock, irqflags); + spin_lock_irqsave(&display->irq.lock, irqflags); bdw_enable_pipe_irq(display, pipe, GEN8_PIPE_VBLANK); - spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); + spin_unlock_irqrestore(&display->irq.lock, irqflags); /* Even if there is no DMC, frame counter can get stuck when * PSR is active as no frames are generated, so check only for PSR. @@ -1734,16 +1723,15 @@ void bdw_disable_vblank(struct drm_crtc *_crtc) { struct intel_crtc *crtc = to_intel_crtc(_crtc); struct intel_display *display = to_intel_display(crtc); - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; unsigned long irqflags; if (gen11_dsi_configure_te(crtc, false)) return; - spin_lock_irqsave(&dev_priv->irq_lock, irqflags); + spin_lock_irqsave(&display->irq.lock, irqflags); bdw_disable_pipe_irq(display, pipe, GEN8_PIPE_VBLANK); - spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); + spin_unlock_irqrestore(&display->irq.lock, irqflags); if (crtc->vblank_psr_notify && --display->irq.vblank_enable_count == 0) schedule_work(&display->irq.vblank_notify_work); @@ -1880,12 +1868,10 @@ static void _vlv_display_irq_reset(struct intel_display *display) void vlv_display_irq_reset(struct intel_display *display) { - struct drm_i915_private *dev_priv = to_i915(display->drm); - - spin_lock_irq(&dev_priv->irq_lock); + spin_lock_irq(&display->irq.lock); if (display->irq.vlv_display_irqs_enabled) _vlv_display_irq_reset(display); - spin_unlock_irq(&dev_priv->irq_lock); + spin_unlock_irq(&display->irq.lock); } void i9xx_display_irq_reset(struct intel_display *display) @@ -1900,33 +1886,29 @@ void i9xx_display_irq_reset(struct intel_display *display) void i915_display_irq_postinstall(struct intel_display *display) { - struct drm_i915_private *dev_priv = to_i915(display->drm); - /* * Interrupt setup is already guaranteed to be single-threaded, this is * just to make the assert_spin_locked check happy. */ - spin_lock_irq(&dev_priv->irq_lock); + spin_lock_irq(&display->irq.lock); i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS); i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS); - spin_unlock_irq(&dev_priv->irq_lock); + spin_unlock_irq(&display->irq.lock); i915_enable_asle_pipestat(display); } void i965_display_irq_postinstall(struct intel_display *display) { - struct drm_i915_private *dev_priv = to_i915(display->drm); - /* * Interrupt setup is already guaranteed to be single-threaded, this is * just to make the assert_spin_locked check happy. */ - spin_lock_irq(&dev_priv->irq_lock); + spin_lock_irq(&display->irq.lock); i915_enable_pipestat(display, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS); i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS); i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS); - spin_unlock_irq(&dev_priv->irq_lock); + spin_unlock_irq(&display->irq.lock); i915_enable_asle_pipestat(display); } @@ -1982,12 +1964,10 @@ static void _vlv_display_irq_postinstall(struct intel_display *display) void vlv_display_irq_postinstall(struct intel_display *display) { - struct drm_i915_private *dev_priv = to_i915(display->drm); - - spin_lock_irq(&dev_priv->irq_lock); + spin_lock_irq(&display->irq.lock); if (display->irq.vlv_display_irqs_enabled) _vlv_display_irq_postinstall(display); - spin_unlock_irq(&dev_priv->irq_lock); + spin_unlock_irq(&display->irq.lock); } void ibx_display_irq_reset(struct intel_display *display) @@ -2084,10 +2064,10 @@ void gen8_irq_power_well_post_enable(struct intel_display *display, gen8_de_pipe_flip_done_mask(display); enum pipe pipe; - spin_lock_irq(&dev_priv->irq_lock); + spin_lock_irq(&display->irq.lock); if (!intel_irqs_enabled(dev_priv)) { - spin_unlock_irq(&dev_priv->irq_lock); + spin_unlock_irq(&display->irq.lock); return; } @@ -2096,7 +2076,7 @@ void gen8_irq_power_well_post_enable(struct intel_display *display, display->irq.de_irq_mask[pipe], ~display->irq.de_irq_mask[pipe] | extra_ier); - spin_unlock_irq(&dev_priv->irq_lock); + spin_unlock_irq(&display->irq.lock); } void gen8_irq_power_well_pre_disable(struct intel_display *display, @@ -2105,17 +2085,17 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display, struct drm_i915_private *dev_priv = to_i915(display->drm); enum pipe pipe; - spin_lock_irq(&dev_priv->irq_lock); + spin_lock_irq(&display->irq.lock); if (!intel_irqs_enabled(dev_priv)) { - spin_unlock_irq(&dev_priv->irq_lock); + spin_unlock_irq(&display->irq.lock); return; } for_each_pipe_masked(display, pipe, pipe_mask) intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe)); - spin_unlock_irq(&dev_priv->irq_lock); + spin_unlock_irq(&display->irq.lock); /* make sure we're done processing display irqs */ intel_synchronize_irq(dev_priv); @@ -2153,7 +2133,7 @@ void valleyview_enable_display_irqs(struct intel_display *display) { struct drm_i915_private *dev_priv = to_i915(display->drm); - spin_lock_irq(&dev_priv->irq_lock); + spin_lock_irq(&display->irq.lock); if (display->irq.vlv_display_irqs_enabled) goto out; @@ -2166,14 +2146,14 @@ void valleyview_enable_display_irqs(struct intel_display *display) } out: - spin_unlock_irq(&dev_priv->irq_lock); + spin_unlock_irq(&display->irq.lock); } void valleyview_disable_display_irqs(struct intel_display *display) { struct drm_i915_private *dev_priv = to_i915(display->drm); - spin_lock_irq(&dev_priv->irq_lock); + spin_lock_irq(&display->irq.lock); if (!display->irq.vlv_display_irqs_enabled) goto out; @@ -2183,7 +2163,7 @@ void valleyview_disable_display_irqs(struct intel_display *display) if (intel_irqs_enabled(dev_priv)) _vlv_display_irq_reset(display); out: - spin_unlock_irq(&dev_priv->irq_lock); + spin_unlock_irq(&display->irq.lock); } void ilk_de_irq_postinstall(struct intel_display *display) @@ -2371,6 +2351,8 @@ void dg1_de_irq_postinstall(struct intel_display *display) void intel_display_irq_init(struct intel_display *display) { + spin_lock_init(&display->irq.lock); + display->drm->vblank_disable_immediate = true; intel_hotplug_irq_init(display); diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c index 941bff5a5eb0..678b24115951 100644 --- a/drivers/gpu/drm/i915/display/intel_display_rps.c +++ b/drivers/gpu/drm/i915/display/intel_display_rps.c @@ -86,20 +86,16 @@ void intel_display_rps_mark_interactive(struct intel_display *display, void ilk_display_rps_enable(struct intel_display *display) { - struct drm_i915_private *i915 = to_i915(display->drm); - - spin_lock(&i915->irq_lock); + spin_lock(&display->irq.lock); ilk_enable_display_irq(display, DE_PCU_EVENT); - spin_unlock(&i915->irq_lock); + spin_unlock(&display->irq.lock); } void ilk_display_rps_disable(struct intel_display *display) { - struct drm_i915_private *i915 = to_i915(display->drm); - - spin_lock(&i915->irq_lock); + spin_lock(&display->irq.lock); ilk_disable_display_irq(display, DE_PCU_EVENT); - spin_unlock(&i915->irq_lock); + spin_unlock(&display->irq.lock); } void ilk_display_rps_irq_handler(struct intel_display *display) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 7415564d058a..d6d0440dcee9 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1388,7 +1388,7 @@ struct intel_crtc { /* armed event for DSB based updates */ struct drm_pending_vblank_event *dsb_event; - /* Access to these should be protected by dev_priv->irq_lock. */ + /* Access to these should be protected by display->irq.lock. */ bool cpu_fifo_underrun_disabled; bool pch_fifo_underrun_disabled; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index b299b5d8b68e..593b29b56714 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -45,12 +45,13 @@ #include #include #include +#include #include #include "g4x_dp.h" -#include "i915_drv.h" #include "i915_irq.h" #include "i915_reg.h" +#include "i915_utils.h" #include "intel_alpm.h" #include "intel_atomic.h" #include "intel_audio.h" @@ -58,6 +59,7 @@ #include "intel_combo_phy_regs.h" #include "intel_connector.h" #include "intel_crtc.h" +#include "intel_crtc_state_dump.h" #include "intel_cx0_phy.h" #include "intel_ddi.h" #include "intel_de.h" @@ -92,7 +94,6 @@ #include "intel_tc.h" #include "intel_vdsc.h" #include "intel_vrr.h" -#include "intel_crtc_state_dump.h" /* DP DSC throughput values used for slice count calculations KPixels/s */ #define DP_DSC_PEAK_PIXEL_RATE 2720000 @@ -6219,12 +6220,11 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *_connector, struct intel_connector *connector = to_intel_connector(_connector); struct intel_display *display = to_intel_display(connector); struct intel_encoder *encoder = intel_attached_encoder(connector); - struct drm_i915_private *i915 = to_i915(display->drm); bool hpd_high = hpd_state == connector_status_connected; unsigned int hpd_pin = encoder->hpd_pin; bool need_work = false; - spin_lock_irq(&i915->irq_lock); + spin_lock_irq(&display->irq.lock); if (hpd_high != test_bit(hpd_pin, &display->hotplug.oob_hotplug_last_state)) { display->hotplug.event_bits |= BIT(hpd_pin); @@ -6233,7 +6233,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *_connector, hpd_high); need_work = true; } - spin_unlock_irq(&i915->irq_lock); + spin_unlock_irq(&display->irq.lock); if (need_work) intel_hpd_schedule_detection(display); diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c index 4e92504f5c14..29c920983413 100644 --- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c +++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c @@ -31,16 +31,16 @@ #include #include #include - #include #include #include +#include #include