Merge branch 'akpm' (Andrew's patch-bomb)
Merge misc patches from Andrew Morton: "The MM tree is rather stuck while I wait to find out what the heck is happening with sched/numa. Probably I'll need to route around all the code which was added to -next, sigh. So this is "everything else", or at least most of it - other small bits are still awaiting resolutions of various kinds." * emailed patches from Andrew Morton <akpm@linux-foundation.org>: (180 commits) lib/decompress.c add __init to decompress_method and data kernel/resource.c: fix stack overflow in __reserve_region_with_split() omfs: convert to use beXX_add_cpu() taskstats: cgroupstats_user_cmd() may leak on error aoe: update aoe-internal version number to 50 aoe: update documentation to better reflect aoe-plus-udev usage aoe: remove unused code aoe: make dynamic block minor numbers the default aoe: update and specify AoE address guards and error messages aoe: retain static block device numbers for backwards compatibility aoe: support more AoE addresses with dynamic block device minor numbers aoe: update documentation with new URL and VM settings reference aoe: update copyright year in touched files aoe: update internal version number to 49 aoe: remove unused code and add cosmetic improvements aoe: increase net_device reference count while using it aoe: associate frames with the AoE storage target aoe: disallow unsupported AoE minor addresses aoe: do revalidation steps in order aoe: failover remote interface based on aoe_deadsecs parameter ...
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@@ -9,6 +9,7 @@ Copyright (C) 2008-2011 Freescale Semiconductor Inc.
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-Run Time Integrity Check (RTIC) Node
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-Run Time Integrity Check (RTIC) Memory Node
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-Secure Non-Volatile Storage (SNVS) Node
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-Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
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-Full Example
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NOTE: the SEC 4 is also known as Freescale's Cryptographic Accelerator
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@@ -294,6 +295,27 @@ Secure Non-Volatile Storage (SNVS) Node
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address and length of the SEC4 configuration
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registers.
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- #address-cells
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Usage: required
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Value type: <u32>
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Definition: A standard property. Defines the number of cells
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for representing physical addresses in child nodes. Must
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have a value of 1.
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- #size-cells
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Usage: required
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Value type: <u32>
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Definition: A standard property. Defines the number of cells
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for representing the size of physical addresses in
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child nodes. Must have a value of 1.
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- ranges
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Usage: required
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Value type: <prop-encoded-array>
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Definition: A standard property. Specifies the physical address
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range of the SNVS register space. A triplet that includes
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the child address, parent address, & length.
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- interrupts
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Usage: required
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Value type: <prop_encoded-array>
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@@ -314,10 +336,33 @@ EXAMPLE
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sec_mon@314000 {
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compatible = "fsl,sec-v4.0-mon";
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reg = <0x314000 0x1000>;
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ranges = <0 0x314000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <93 2>;
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};
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=====================================================================
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Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
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A SNVS child node that defines SNVS LP RTC.
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- compatible
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Usage: required
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Value type: <string>
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Definition: Must include "fsl,sec-v4.0-mon-rtc-lp".
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- reg
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Usage: required
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Value type: <prop-encoded-array>
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Definition: A standard property. Specifies the physical
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address and length of the SNVS LP configuration registers.
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EXAMPLE
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sec_mon_rtc_lp@314000 {
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compatible = "fsl,sec-v4.0-mon-rtc-lp";
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reg = <0x34 0x58>;
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};
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=====================================================================
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FULL EXAMPLE
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@@ -390,8 +435,14 @@ FULL EXAMPLE
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sec_mon: sec_mon@314000 {
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compatible = "fsl,sec-v4.0-mon";
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reg = <0x314000 0x1000>;
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ranges = <0 0x314000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <93 2>;
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sec_mon_rtc_lp@34 {
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compatible = "fsl,sec-v4.0-mon-rtc-lp";
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reg = <0x34 0x58>;
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};
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};
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=====================================================================
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1
Documentation/devicetree/bindings/rtc/snvs-rtc.txt
Normal file
1
Documentation/devicetree/bindings/rtc/snvs-rtc.txt
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@@ -0,0 +1 @@
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See Documentation/devicetree/bindings/crypto/fsl-sec4.txt for details.
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