ncr5380: Use runtime register mapping
Convert compile-time C400_ register mapping to runtime mapping. This removes the weird negative register offsets and allows adding additional mappings. While at it, convert read/write loops into insb/outsb. Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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Martin K. Petersen
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f03946210d
commit
12150797d0
@@ -163,8 +163,7 @@
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/* Write any value to this register to start an ini mode DMA receive */
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#define START_DMA_INITIATOR_RECEIVE_REG 7 /* wo */
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#define C400_CONTROL_STATUS_REG NCR53C400_register_offset-8 /* rw */
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/* NCR 53C400(A) Control Status Register bits: */
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#define CSR_RESET 0x80 /* wo Resets 53c400 */
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#define CSR_53C80_REG 0x80 /* ro 5380 registers busy */
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#define CSR_TRANS_DIR 0x40 /* rw Data transfer direction */
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@@ -181,16 +180,6 @@
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#define CSR_BASE CSR_53C80_INTR
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#endif
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/* Number of 128-byte blocks to be transferred */
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#define C400_BLOCK_COUNTER_REG NCR53C400_register_offset-7 /* rw */
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/* Resume transfer after disconnect */
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#define C400_RESUME_TRANSFER_REG NCR53C400_register_offset-6 /* wo */
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/* Access to host buffer stack */
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#define C400_HOST_BUFFER NCR53C400_register_offset-4 /* rw */
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/* Note : PHASE_* macros are based on the values of the STATUS register */
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#define PHASE_MASK (SR_MSG | SR_CD | SR_IO)
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