From c5aee2bc9981fb57cce753d3d7c42ed9b00bd6ac Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Thu, 2 Mar 2017 15:22:29 +0100 Subject: [PATCH 01/22] clk: meson-gxbb: expose spdif clock gates Expose the clock gates required for the spdif output Acked-by: Michael Turquette Signed-off-by: Jerome Brunet --- drivers/clk/meson/gxbb.h | 4 ++-- include/dt-bindings/clock/gxbb-clkc.h | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h index 93b8f07ee7af..541c85cd0dcb 100644 --- a/drivers/clk/meson/gxbb.h +++ b/drivers/clk/meson/gxbb.h @@ -209,7 +209,7 @@ /* CLKID_ETH */ #define CLKID_DEMUX 37 /* CLKID_AIU_GLUE */ -#define CLKID_IEC958 39 +/* CLKID_IEC958 */ /* CLKID_I2S_OUT */ #define CLKID_AMCLK 41 #define CLKID_AIFIFO2 42 @@ -251,7 +251,7 @@ #define CLKID_GCLK_VENCI_INT 78 #define CLKID_DAC_CLK 79 /* CLKID_AOCLK_GATE */ -#define CLKID_IEC958_GATE 81 +/* CLKID_IEC958_GATE */ #define CLKID_ENC480P 82 #define CLKID_RNG1 83 #define CLKID_GCLK_VENCI_INT1 84 diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index 3190e30b9398..ce1c90f70b24 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h @@ -19,6 +19,7 @@ #define CLKID_SPI 34 #define CLKID_ETH 36 #define CLKID_AIU_GLUE 38 +#define CLKID_IEC958 39 #define CLKID_I2S_OUT 40 #define CLKID_MIXER_IFACE 44 #define CLKID_AIU 47 @@ -31,6 +32,7 @@ #define CLKID_SANA 69 #define CLKID_GCLK_VENCI_INT0 77 #define CLKID_AOCLK_GATE 80 +#define CLKID_IEC958_GATE 81 #define CLKID_AO_I2C 93 #define CLKID_SD_EMMC_A 94 #define CLKID_SD_EMMC_B 95 From b4d44cdcaf993780304e225bde12a5053076baeb Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Thu, 26 Jan 2017 11:12:52 +0100 Subject: [PATCH 02/22] clk: meson-gxbb: expose i2s master clock Expose cts_amclk in the device tree bindings Acked-by: Michael Turquette Signed-off-by: Jerome Brunet --- drivers/clk/meson/gxbb.h | 2 +- include/dt-bindings/clock/gxbb-clkc.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h index 541c85cd0dcb..58ba2889787f 100644 --- a/drivers/clk/meson/gxbb.h +++ b/drivers/clk/meson/gxbb.h @@ -277,7 +277,7 @@ #define CLKID_MALI_1_DIV 104 /* CLKID_MALI_1 */ /* CLKID_MALI */ -#define CLKID_CTS_AMCLK 107 +/* CLKID_CTS_AMCLK */ #define CLKID_CTS_AMCLK_SEL 108 #define CLKID_CTS_AMCLK_DIV 109 #define CLKID_CTS_MCLK_I958 110 diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index ce1c90f70b24..d19c0dbf42d3 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h @@ -44,5 +44,6 @@ #define CLKID_MALI_1_SEL 103 #define CLKID_MALI_1 105 #define CLKID_MALI 106 +#define CLKID_CTS_AMCLK 107 #endif /* __GXBB_CLKC_H */ From 0420dbb5acd5b13c850387ab3f36812239984501 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Thu, 2 Mar 2017 15:23:38 +0100 Subject: [PATCH 03/22] clk: meson-gxbb: expose spdif master clock Expose the spdif master clock and the mux to select the appropriate spdif clock parent depending on the data source. Acked-by: Michael Turquette Signed-off-by: Jerome Brunet --- drivers/clk/meson/gxbb.h | 4 ++-- include/dt-bindings/clock/gxbb-clkc.h | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h index 58ba2889787f..f5f7d81d043a 100644 --- a/drivers/clk/meson/gxbb.h +++ b/drivers/clk/meson/gxbb.h @@ -280,10 +280,10 @@ /* CLKID_CTS_AMCLK */ #define CLKID_CTS_AMCLK_SEL 108 #define CLKID_CTS_AMCLK_DIV 109 -#define CLKID_CTS_MCLK_I958 110 +/* CLKID_CTS_MCLK_I958 */ #define CLKID_CTS_MCLK_I958_SEL 111 #define CLKID_CTS_MCLK_I958_DIV 112 -#define CLKID_CTS_I958 113 +/* CLKID_CTS_I958 */ #define NR_CLKS 114 diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index d19c0dbf42d3..cc3bb3180d3f 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h @@ -45,5 +45,7 @@ #define CLKID_MALI_1 105 #define CLKID_MALI 106 #define CLKID_CTS_AMCLK 107 +#define CLKID_CTS_MCLK_I958 110 +#define CLKID_CTS_I958 113 #endif /* __GXBB_CLKC_H */ From 34f267f1620ac2c5b4f45cbb93226ddb80c3c6bd Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 20 Apr 2017 13:59:10 +0200 Subject: [PATCH 04/22] clk: meson-gxbb: expose SPICC gate Expose the SPICC gate clock to enable the SPICC controller. Acked-by: Jerome Brunet Signed-off-by: Neil Armstrong [tidy commit message to match similar changes] Signed-off-by: Jerome Brunet --- drivers/clk/meson/gxbb.h | 2 +- include/dt-bindings/clock/gxbb-clkc.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h index f5f7d81d043a..e447f02fcd16 100644 --- a/drivers/clk/meson/gxbb.h +++ b/drivers/clk/meson/gxbb.h @@ -191,7 +191,7 @@ #define CLKID_ISA 18 #define CLKID_PL301 19 #define CLKID_PERIPHS 20 -#define CLKID_SPICC 21 +/* CLKID_SPICC */ /* CLKID_I2C */ /* #define CLKID_SAR_ADC */ #define CLKID_SMART_CARD 24 diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index cc3bb3180d3f..a1b2b5088d3a 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h @@ -13,6 +13,7 @@ #define CLKID_GP0_PLL 9 #define CLKID_CLK81 12 #define CLKID_MPLL2 15 +#define CLKID_SPICC 21 #define CLKID_I2C 22 #define CLKID_SAR_ADC 23 #define CLKID_RNG0 25 From 9dc6bd7678f6ee518c92808886ee087e31f749cf Mon Sep 17 00:00:00 2001 From: Helmut Klein Date: Fri, 31 Mar 2017 18:54:34 +0200 Subject: [PATCH 05/22] clk: meson-gxbb: expose UART clocks Expose the clock ids of the three none AO uarts to the dt-bindings Acked-by: Neil Armstrong Signed-off-by: Helmut Klein Signed-off-by: Neil Armstrong [tidy the commit message to match similar change] Signed-off-by: Jerome Brunet --- drivers/clk/meson/gxbb.h | 6 +++--- include/dt-bindings/clock/gxbb-clkc.h | 3 +++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h index e447f02fcd16..16ab5b2707c1 100644 --- a/drivers/clk/meson/gxbb.h +++ b/drivers/clk/meson/gxbb.h @@ -196,7 +196,7 @@ /* #define CLKID_SAR_ADC */ #define CLKID_SMART_CARD 24 /* CLKID_RNG0 */ -#define CLKID_UART0 26 +/* CLKID_UART0 */ #define CLKID_SDHC 27 #define CLKID_STREAM 28 #define CLKID_ASYNC_FIFO 29 @@ -218,7 +218,7 @@ #define CLKID_ADC 45 #define CLKID_BLKMV 46 /* CLKID_AIU */ -#define CLKID_UART1 48 +/* CLKID_UART1 */ #define CLKID_G2D 49 /* CLKID_USB0 */ /* CLKID_USB1 */ @@ -238,7 +238,7 @@ /* CLKID_USB0_DDR_BRIDGE */ #define CLKID_MMC_PCLK 66 #define CLKID_DVIN 67 -#define CLKID_UART2 68 +/* CLKID_UART2 */ /* #define CLKID_SANA */ #define CLKID_VPU_INTR 70 #define CLKID_SEC_AHB_AHB3_BRIDGE 71 diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index a1b2b5088d3a..98b39c2e79af 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h @@ -17,6 +17,7 @@ #define CLKID_I2C 22 #define CLKID_SAR_ADC 23 #define CLKID_RNG0 25 +#define CLKID_UART0 26 #define CLKID_SPI 34 #define CLKID_ETH 36 #define CLKID_AIU_GLUE 38 @@ -24,12 +25,14 @@ #define CLKID_I2S_OUT 40 #define CLKID_MIXER_IFACE 44 #define CLKID_AIU 47 +#define CLKID_UART1 48 #define CLKID_USB0 50 #define CLKID_USB1 51 #define CLKID_USB 55 #define CLKID_HDMI_PCLK 63 #define CLKID_USB1_DDR_BRIDGE 64 #define CLKID_USB0_DDR_BRIDGE 65 +#define CLKID_UART2 68 #define CLKID_SANA 69 #define CLKID_GCLK_VENCI_INT0 77 #define CLKID_AOCLK_GATE 80 From f40a8ce96ae141f5ec83204471df4902e86a572c Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 4 May 2017 20:19:19 +0200 Subject: [PATCH 06/22] clk: meson-gxbb: un-export the CPU clock The CPU clock defined in the Meson GX clock driver is actually a left-over from the Meson8b clock controller. Un-export the clock so we can remove it from the driver. Signed-off-by: Martin Blumenstingl Signed-off-by: Jerome Brunet --- drivers/clk/meson/gxbb.h | 2 +- include/dt-bindings/clock/gxbb-clkc.h | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h index 16ab5b2707c1..4d04f4a3cd59 100644 --- a/drivers/clk/meson/gxbb.h +++ b/drivers/clk/meson/gxbb.h @@ -171,7 +171,7 @@ * to be exposed to client nodes in DT: include/dt-bindings/clock/gxbb-clkc.h */ #define CLKID_SYS_PLL 0 -/* CLKID_CPUCLK */ +#define CLKID_CPUCLK 1 /* CLKID_HDMI_PLL */ #define CLKID_FIXED_PLL 3 /* CLKID_FCLK_DIV2 */ diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index 98b39c2e79af..e3e9f7919c31 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h @@ -5,7 +5,6 @@ #ifndef __GXBB_CLKC_H #define __GXBB_CLKC_H -#define CLKID_CPUCLK 1 #define CLKID_HDMI_PLL 2 #define CLKID_FCLK_DIV2 4 #define CLKID_FCLK_DIV3 5 From 70ad0d0351470d6c1d22063497e644ecf847b63f Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sun, 11 Jun 2017 12:16:32 +0200 Subject: [PATCH 07/22] clk: meson8b: export the SAR ADC clocks Export the clocks for the SAR ADC so they can be used in the dt-bindings. Signed-off-by: Martin Blumenstingl Acked-by: Neil Armstrong Signed-off-by: Jerome Brunet --- drivers/clk/meson/meson8b.h | 4 ++-- include/dt-bindings/clock/meson8b-clkc.h | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/clk/meson/meson8b.h b/drivers/clk/meson/meson8b.h index 3881defc8644..5447d4a5c9ba 100644 --- a/drivers/clk/meson/meson8b.h +++ b/drivers/clk/meson/meson8b.h @@ -87,7 +87,7 @@ #define CLKID_PERIPHS 20 #define CLKID_SPICC 21 #define CLKID_I2C 22 -#define CLKID_SAR_ADC 23 +/* #define CLKID_SAR_ADC */ #define CLKID_SMART_CARD 24 #define CLKID_RNG0 25 #define CLKID_UART0 26 @@ -133,7 +133,7 @@ #define CLKID_MMC_PCLK 66 #define CLKID_DVIN 67 #define CLKID_UART2 68 -#define CLKID_SANA 69 +/* #define CLKID_SANA */ #define CLKID_VPU_INTR 70 #define CLKID_SEC_AHB_AHB3_BRIDGE 71 #define CLKID_CLK81_A9 72 diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h index a55ff8c9b30f..1c7f090da440 100644 --- a/include/dt-bindings/clock/meson8b-clkc.h +++ b/include/dt-bindings/clock/meson8b-clkc.h @@ -21,5 +21,7 @@ #define CLKID_ZERO 13 #define CLKID_MPEG_SEL 14 #define CLKID_MPEG_DIV 15 +#define CLKID_SAR_ADC 23 +#define CLKID_SANA 69 #endif /* __MESON8B_CLKC_H */ From e2e5f3211fe2b57f4a9feed5c053c48aea7eb2a2 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sun, 11 Jun 2017 12:16:33 +0200 Subject: [PATCH 08/22] clk: meson8b: export the SDIO clock Export the SDIO clock so it can be used in the dt-bindings. Signed-off-by: Martin Blumenstingl Acked-by: Neil Armstrong Signed-off-by: Jerome Brunet --- drivers/clk/meson/meson8b.h | 2 +- include/dt-bindings/clock/meson8b-clkc.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/meson/meson8b.h b/drivers/clk/meson/meson8b.h index 5447d4a5c9ba..e0fb386ccc23 100644 --- a/drivers/clk/meson/meson8b.h +++ b/drivers/clk/meson/meson8b.h @@ -94,7 +94,7 @@ #define CLKID_SDHC 27 #define CLKID_STREAM 28 #define CLKID_ASYNC_FIFO 29 -#define CLKID_SDIO 30 +/* #define CLKID_SDIO */ #define CLKID_ABUF 31 #define CLKID_HIU_IFACE 32 #define CLKID_ASSIST_MISC 33 diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h index 1c7f090da440..821b08574900 100644 --- a/include/dt-bindings/clock/meson8b-clkc.h +++ b/include/dt-bindings/clock/meson8b-clkc.h @@ -22,6 +22,7 @@ #define CLKID_MPEG_SEL 14 #define CLKID_MPEG_DIV 15 #define CLKID_SAR_ADC 23 +#define CLKID_SDIO 30 #define CLKID_SANA 69 #endif /* __MESON8B_CLKC_H */ From 06eff6a792967d0cbb70424bc6acded91b28e41f Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sun, 11 Jun 2017 12:16:34 +0200 Subject: [PATCH 09/22] clk: meson8b: export the gate clock for the HW random number generator This exports the clock so it can be used in the dt-bindings. Signed-off-by: Martin Blumenstingl Acked-by: Neil Armstrong Signed-off-by: Jerome Brunet --- drivers/clk/meson/meson8b.h | 2 +- include/dt-bindings/clock/meson8b-clkc.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/meson/meson8b.h b/drivers/clk/meson/meson8b.h index e0fb386ccc23..51c3f6717180 100644 --- a/drivers/clk/meson/meson8b.h +++ b/drivers/clk/meson/meson8b.h @@ -89,7 +89,7 @@ #define CLKID_I2C 22 /* #define CLKID_SAR_ADC */ #define CLKID_SMART_CARD 24 -#define CLKID_RNG0 25 +/* #define CLKID_RNG0 */ #define CLKID_UART0 26 #define CLKID_SDHC 27 #define CLKID_STREAM 28 diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h index 821b08574900..f004e6760b5d 100644 --- a/include/dt-bindings/clock/meson8b-clkc.h +++ b/include/dt-bindings/clock/meson8b-clkc.h @@ -22,6 +22,7 @@ #define CLKID_MPEG_SEL 14 #define CLKID_MPEG_DIV 15 #define CLKID_SAR_ADC 23 +#define CLKID_RNG0 25 #define CLKID_SDIO 30 #define CLKID_SANA 69 From 677f6af5d685a5990148222804f3649196789b91 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sun, 11 Jun 2017 12:16:35 +0200 Subject: [PATCH 10/22] clk: meson8b: export the USB clocks Export the USB related clocks (for the USB controller and the USB2 PHYs) so they can be used in the dt-bindings. Signed-off-by: Martin Blumenstingl Acked-by: Neil Armstrong Signed-off-by: Jerome Brunet --- drivers/clk/meson/meson8b.h | 10 +++++----- include/dt-bindings/clock/meson8b-clkc.h | 5 +++++ 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/clk/meson/meson8b.h b/drivers/clk/meson/meson8b.h index 51c3f6717180..17479c60864d 100644 --- a/drivers/clk/meson/meson8b.h +++ b/drivers/clk/meson/meson8b.h @@ -114,12 +114,12 @@ #define CLKID_AIU 47 #define CLKID_UART1 48 #define CLKID_G2D 49 -#define CLKID_USB0 50 -#define CLKID_USB1 51 +/* #define CLKID_USB0 */ +/* #define CLKID_USB1 */ #define CLKID_RESET 52 #define CLKID_NAND 53 #define CLKID_DOS_PARSER 54 -#define CLKID_USB 55 +/* #define CLKID_USB */ #define CLKID_VDIN1 56 #define CLKID_AHB_ARB0 57 #define CLKID_EFUSE 58 @@ -128,8 +128,8 @@ #define CLKID_AHB_CTRL_BUS 61 #define CLKID_HDMI_INTR_SYNC 62 #define CLKID_HDMI_PCLK 63 -#define CLKID_USB1_DDR_BRIDGE 64 -#define CLKID_USB0_DDR_BRIDGE 65 +/* CLKID_USB1_DDR_BRIDGE */ +/* CLKID_USB0_DDR_BRIDGE */ #define CLKID_MMC_PCLK 66 #define CLKID_DVIN 67 #define CLKID_UART2 68 diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h index f004e6760b5d..04f0d1fcd308 100644 --- a/include/dt-bindings/clock/meson8b-clkc.h +++ b/include/dt-bindings/clock/meson8b-clkc.h @@ -24,6 +24,11 @@ #define CLKID_SAR_ADC 23 #define CLKID_RNG0 25 #define CLKID_SDIO 30 +#define CLKID_USB0 50 +#define CLKID_USB1 51 +#define CLKID_USB 55 +#define CLKID_USB1_DDR_BRIDGE 64 +#define CLKID_USB0_DDR_BRIDGE 65 #define CLKID_SANA 69 #endif /* __MESON8B_CLKC_H */ From c22f06d3c0c943005697d03e46dccad2aa0bc8c0 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sun, 11 Jun 2017 12:16:36 +0200 Subject: [PATCH 11/22] clk: meson8b: export the ethernet gate clock Export the ethernet gate clock to the dt-bindings. Signed-off-by: Martin Blumenstingl Acked-by: Neil Armstrong Signed-off-by: Jerome Brunet --- drivers/clk/meson/meson8b.h | 2 +- include/dt-bindings/clock/meson8b-clkc.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/meson/meson8b.h b/drivers/clk/meson/meson8b.h index 17479c60864d..a687e02547dc 100644 --- a/drivers/clk/meson/meson8b.h +++ b/drivers/clk/meson/meson8b.h @@ -100,7 +100,7 @@ #define CLKID_ASSIST_MISC 33 #define CLKID_SPI 34 #define CLKID_I2S_SPDIF 35 -#define CLKID_ETH 36 +/* #define CLKID_ETH */ #define CLKID_DEMUX 37 #define CLKID_AIU_GLUE 38 #define CLKID_IEC958 39 diff --git a/include/dt-bindings/clock/meson8b-clkc.h b/include/dt-bindings/clock/meson8b-clkc.h index 04f0d1fcd308..e29227fb52a1 100644 --- a/include/dt-bindings/clock/meson8b-clkc.h +++ b/include/dt-bindings/clock/meson8b-clkc.h @@ -24,6 +24,7 @@ #define CLKID_SAR_ADC 23 #define CLKID_RNG0 25 #define CLKID_SDIO 30 +#define CLKID_ETH 36 #define CLKID_USB0 50 #define CLKID_USB1 51 #define CLKID_USB 55 From 79eb80b70c4e05defb4d6f6e68840a052e73ae2d Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 10 Jun 2017 00:20:39 +0200 Subject: [PATCH 12/22] ARM: dts: meson8: fix the IR receiver pins The IR receiver pins are currently defined in the CBUS pin-controller. However the pins are in the AO region, which is controlled by the AOBUS pin-controller. Move the pins to pinctrl_aobus so they can actually be used. Fixes: b60e1157d8fa ("ARM: dts: amlogic: Split pinctrl device for Meson8 / Meson8b") Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8.dtsi | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 9b0b3ddbb17e..e4f7357b4b31 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -116,6 +116,13 @@ function = "i2c_mst_ao"; }; }; + + ir_recv_pins: remote { + mux { + groups = "remote_input"; + function = "remote"; + }; + }; }; }; @@ -151,13 +158,6 @@ }; }; - ir_recv_pins: remote { - mux { - groups = "remote_input"; - function = "remote"; - }; - }; - eth_pins: ethernet { mux { groups = "eth_tx_clk_50m", "eth_tx_en", From 7a16f06b90ab73343af982ded3ac2710259c37aa Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 15 Jun 2017 23:33:43 +0200 Subject: [PATCH 13/22] ARM: dts: meson: use C preprocessor friendly include syntax This replaces the "/include/" syntax with the "#include" syntax in all Amlogic Meson .dts and .dtsi files. That is required to use preprocessor defines (like GIC_SPI and IRQ_TYPE_EDGE_RISING) in meson.dtsi (all files which directly or indirectly include meson.dtsi need to use the "#include" syntax, otherwise the .dts files cannot be compiled). Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson6-atv1200.dts | 2 +- arch/arm/boot/dts/meson6.dtsi | 2 +- arch/arm/boot/dts/meson8.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/meson6-atv1200.dts b/arch/arm/boot/dts/meson6-atv1200.dts index 1237faa63ce6..9444b0d9628f 100644 --- a/arch/arm/boot/dts/meson6-atv1200.dts +++ b/arch/arm/boot/dts/meson6-atv1200.dts @@ -46,7 +46,7 @@ */ /dts-v1/; -/include/ "meson6.dtsi" +#include "meson6.dtsi" / { model = "Geniatech ATV1200"; diff --git a/arch/arm/boot/dts/meson6.dtsi b/arch/arm/boot/dts/meson6.dtsi index b0fc91ffd6a1..8557b6117a4b 100644 --- a/arch/arm/boot/dts/meson6.dtsi +++ b/arch/arm/boot/dts/meson6.dtsi @@ -45,7 +45,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -/include/ "meson.dtsi" +#include "meson.dtsi" / { model = "Amlogic Meson6 SoC"; diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index e4f7357b4b31..c5d73b999773 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -45,7 +45,7 @@ #include #include -/include/ "meson.dtsi" +#include "meson.dtsi" / { model = "Amlogic Meson8 SoC"; From 5239e0504826d4b2ca7c225cc32d1a1a9e755453 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 15 Jun 2017 23:33:44 +0200 Subject: [PATCH 14/22] ARM: dts: meson: use GIC_SPI and IRQ_TYPE_EDGE_RISING macros This makes meson.dtsi easier to read as we are not using magic numbers for the GIC interrupt type (GIC_SPI) and the interrupt polarity (IRQ_TYPE_EDGE_RISING). Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson.dtsi | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index 8d9c36970dfd..d287f606e06f 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -45,6 +45,8 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include +#include /include/ "skeleton.dtsi" / { @@ -81,21 +83,21 @@ uart_A: serial@84c0 { compatible = "amlogic,meson-uart"; reg = <0x84c0 0x18>; - interrupts = <0 26 1>; + interrupts = ; status = "disabled"; }; uart_B: serial@84dc { compatible = "amlogic,meson-uart"; reg = <0x84dc 0x18>; - interrupts = <0 75 1>; + interrupts = ; status = "disabled"; }; i2c_A: i2c@8500 { compatible = "amlogic,meson6-i2c"; reg = <0x8500 0x20>; - interrupts = <0 21 1>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -104,14 +106,14 @@ uart_C: serial@8700 { compatible = "amlogic,meson-uart"; reg = <0x8700 0x18>; - interrupts = <0 93 1>; + interrupts = ; status = "disabled"; }; i2c_B: i2c@87c0 { compatible = "amlogic,meson6-i2c"; reg = <0x87c0 0x20>; - interrupts = <0 128 1>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -128,13 +130,13 @@ wdt: watchdog@9900 { compatible = "amlogic,meson6-wdt"; reg = <0x9900 0x8>; - interrupts = <0 0 1>; + interrupts = ; }; timer@9940 { compatible = "amlogic,meson6-timer"; reg = <0x9940 0x18>; - interrupts = <0 10 1>; + interrupts = ; }; }; @@ -148,21 +150,21 @@ ir_receiver: ir-receiver@480 { compatible= "amlogic,meson6-ir"; reg = <0x480 0x20>; - interrupts = <0 15 1>; + interrupts = ; status = "disabled"; }; uart_AO: serial@4c0 { compatible = "amlogic,meson-uart"; reg = <0x4c0 0x18>; - interrupts = <0 90 1>; + interrupts = ; status = "disabled"; }; i2c_AO: i2c@500 { compatible = "amlogic,meson6-i2c"; reg = <0x500 0x20>; - interrupts = <0 92 1>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -173,7 +175,7 @@ compatible = "amlogic,meson6-dwmac", "snps,dwmac"; reg = <0xc9410000 0x10000 0xc1108108 0x4>; - interrupts = <0 8 1>; + interrupts = ; interrupt-names = "macirq"; status = "disabled"; }; From 192ec775f5b1530b4394de6236aa72f1dc69422e Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 15 Jun 2017 23:33:45 +0200 Subject: [PATCH 15/22] ARM: dts: meson8: add the PWM_E and PWM_F pins This adds the definition of the PWM_E (CBUS) and PWM_F (AOBUS) to meson8.dtsi, allowing devices to use them. PWM_E can be used on some devices to generate the 32.768kHz clock for the SDIO wifi module, while PWM_F can be used to control the power LED. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index c5d73b999773..5ff7903964c6 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -123,6 +123,13 @@ function = "remote"; }; }; + + pwm_f_ao_pins: pwm-f-ao { + mux { + groups = "pwm_f_ao"; + function = "pwm_f_ao"; + }; + }; }; }; @@ -168,6 +175,13 @@ function = "ethernet"; }; }; + + pwm_e_pins: pwm-e { + mux { + groups = "pwm_e"; + function = "pwm_e"; + }; + }; }; }; From d42ce5a98dcd7ffc59699127d0597c17859f347d Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 15 Jun 2017 23:33:46 +0200 Subject: [PATCH 16/22] ARM: dts: meson8: add the pins for the SDIO controller Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 5ff7903964c6..bb3608bddc98 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -158,6 +158,30 @@ gpio-ranges = <&pinctrl_cbus 0 0 120>; }; + sd_a_pins: sd-a { + mux { + groups = "sd_d0_a", "sd_d1_a", "sd_d2_a", + "sd_d3_a", "sd_clk_a", "sd_cmd_a"; + function = "sd_a"; + }; + }; + + sd_b_pins: sd-b { + mux { + groups = "sd_d0_b", "sd_d1_b", "sd_d2_b", + "sd_d3_b", "sd_clk_b", "sd_cmd_b"; + function = "sd_b"; + }; + }; + + sd_c_pins: sd-c { + mux { + groups = "sd_d0_c", "sd_d1_c", "sd_d2_c", + "sd_d3_c", "sd_clk_c", "sd_cmd_c"; + function = "sd_c"; + }; + }; + spi_nor_pins: nor { mux { groups = "nor_d", "nor_q", "nor_c", "nor_cs"; From a39a3b9f4ff0aba7c2c475afaa52a3eb52d2b9ad Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 15 Jun 2017 23:33:47 +0200 Subject: [PATCH 17/22] ARM: dts: meson: add the SAR ADC This adds the SAR ADC to meson.dtsi and configures the clocks on Meson8 and Meson8b to allow boards to use it. Some boards use it to connect a button to it. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson.dtsi | 8 ++++++++ arch/arm/boot/dts/meson8.dtsi | 8 ++++++++ arch/arm/boot/dts/meson8b.dtsi | 8 ++++++++ 3 files changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index d287f606e06f..46706d74a145 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -103,6 +103,14 @@ status = "disabled"; }; + saradc: adc@8680 { + compatible = "amlogic,meson-saradc"; + reg = <0x8680 0x34>; + #io-channel-cells = <1>; + interrupts = ; + status = "disabled"; + }; + uart_C: serial@8700 { compatible = "amlogic,meson-uart"; reg = <0x8700 0x18>; diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index bb3608bddc98..6687b1b4c7c9 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -232,6 +232,14 @@ arm,filter-ranges = <0x100000 0xc0000000>; }; +&saradc { + compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc"; + clocks = <&clkc CLKID_XTAL>, + <&clkc CLKID_SAR_ADC>, + <&clkc CLKID_SANA>; + clock-names = "clkin", "core", "sana"; +}; + &spifc { clocks = <&clkc CLKID_CLK81>; }; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index d9f116a418b2..1c09090ff4a5 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -177,6 +177,14 @@ arm,filter-ranges = <0x100000 0xc0000000>; }; +&saradc { + compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; + clocks = <&clkc CLKID_XTAL>, + <&clkc CLKID_SAR_ADC>, + <&clkc CLKID_SANA>; + clock-names = "clkin", "core", "sana"; +}; + &uart_AO { clocks = <&clkc CLKID_CLK81>; }; From 8a7f0c52e8a07ac31784a2dd62c001d38843dfe6 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 15 Jun 2017 23:33:48 +0200 Subject: [PATCH 18/22] ARM: dts: meson8: add reserved memory zones There seem to be two memory regions that need to be reserved, otherwise the system just hangs when running: $ stress --vm-bytes $(awk '/MemFree/{printf "%d\n", $2 * 0.9;}' < /proc/meminfo)k \ --vm-keep -m 1 The first memory region is really crucial and without it the system hangs. I could not find any references to this in Amlogic's GPL kernel sources. The second region is used by the "suspend firmware". The u-boot sources (/arch/arm/cpu/aml_meson/m8/firmwareld.c) state that the suspend firmware is located at "64M + 15M" which matches CONFIG_MESON_SUSPEND in the Amlogic GPL kernel sources. The "suspend firmware" is responsible for waking up the system from suspend state. This also fixes reading the full SD card as without this the system would simply hang (probably related to the first memory region, if some buffer is allocated there). Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 6687b1b4c7c9..df79a34a3530 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -83,6 +83,33 @@ reg = <0x203>; }; }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* 2 MiB reserved for Hardware ROM Firmware? */ + hwrom@0 { + reg = <0x0 0x200000>; + no-map; + }; + + /* + * 1 MiB reserved for the "ARM Power Firmware": this is ARM + * code which is responsible for system suspend. It loads a + * piece of ARC code ("arc_power" in the vendor u-boot tree) + * into SRAM, executes that and shuts down the (last) ARM core. + * The arc_power firmware then checks various wakeup sources + * (IR remote receiver, HDMI CEC, WIFI and Bluetooth wakeup or + * simply the power key) and re-starts the ARM core once it + * detects a wakeup request. + */ + power-firmware@4f00000 { + reg = <0x4f00000 0x100000>; + no-map; + }; + }; }; /* end of / */ &aobus { From a35910d3994a6d1f59b140dea6b00b8a7b134878 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 15 Jun 2017 23:33:49 +0200 Subject: [PATCH 19/22] ARM: dts: meson: add the hardware random number generator All supported Meson SoCs have a random number generator in CBUS. Newer SoCs (GXBB, GXL and GXM) provide only one 32-bit random number register, whereas the older SoCs (Meson6, Meson8 and Meson8b) have two 32-bit random number registers. The existing meson-rng driver only supports the lower 32-bit - but it still works fine on the older SoCs apart from this small limitation. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson.dtsi | 5 +++++ arch/arm/boot/dts/meson8.dtsi | 6 ++++++ arch/arm/boot/dts/meson8b.dtsi | 6 ++++++ 3 files changed, 17 insertions(+) diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index 46706d74a145..bf37606ba82e 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -80,6 +80,11 @@ #size-cells = <1>; ranges = <0x0 0xc1100000 0x200000>; + hwrng: rng@8100 { + compatible = "amlogic,meson-rng"; + reg = <0x8100 0x8>; + }; + uart_A: serial@84c0 { compatible = "amlogic,meson-uart"; reg = <0x84c0 0x18>; diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index df79a34a3530..b4c5fdd7b451 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -241,6 +241,12 @@ clock-names = "stmmaceth"; }; +&hwrng { + compatible = "amlogic,meson8-rng", "amlogic,meson-rng"; + clocks = <&clkc CLKID_RNG0>; + clock-names = "core"; +}; + &i2c_AO { clocks = <&clkc CLKID_CLK81>; }; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 1c09090ff4a5..a9d7074e6369 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -171,6 +171,12 @@ }; }; +&hwrng { + compatible = "amlogic,meson8b-rng", "amlogic,meson-rng"; + clocks = <&clkc CLKID_RNG0>; + clock-names = "core"; +}; + &L2 { arm,data-latency = <3 3 3>; arm,tag-latency = <2 2 2>; From e29b1cf87473811584c8cf02d624954d7784fa5a Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 15 Jun 2017 23:33:50 +0200 Subject: [PATCH 20/22] ARM: dts: meson: add USB support on Meson8 and Meson8b This adds the DWC2 USB controller nodes and the corresponding USB2 PHY nodes to meson.dtsi (as the same - or at least a very similar) IP block is used on all SoCs (at the same physical address). Additionally meson8.dtsi and meson8b.dtsi add the required clocks to the DWC2 and USB2 PHY nodes, otherwise the DWC2 controller cannot be initialized by the dwc2 driver. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson.dtsi | 38 ++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/meson8.dtsi | 24 +++++++++++++++++++++ arch/arm/boot/dts/meson8b.dtsi | 26 +++++++++++++++++++++++ 3 files changed, 88 insertions(+) diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index bf37606ba82e..15204e44161d 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -132,6 +132,20 @@ status = "disabled"; }; + usb0_phy: phy@8800 { + compatible = "amlogic,meson-mx-usb2-phy"; + #phy-cells = <0>; + reg = <0x8800 0x20>; + status = "disabled"; + }; + + usb1_phy: phy@8820 { + compatible = "amlogic,meson-mx-usb2-phy"; + #phy-cells = <0>; + reg = <0x8820 0x20>; + status = "disabled"; + }; + spifc: spi@8c80 { compatible = "amlogic,meson6-spifc"; reg = <0x8c80 0x80>; @@ -184,6 +198,30 @@ }; }; + usb0: usb@c9040000 { + compatible = "snps,dwc2"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc9040000 0x40000>; + interrupts = ; + phys = <&usb0_phy>; + phy-names = "usb2-phy"; + dr_mode = "host"; + status = "disabled"; + }; + + usb1: usb@c90c0000 { + compatible = "snps,dwc2"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc90c0000 0x40000>; + interrupts = ; + phys = <&usb1_phy>; + phy-names = "usb2-phy"; + dr_mode = "host"; + status = "disabled"; + }; + ethmac: ethernet@c9410000 { compatible = "amlogic,meson6-dwmac", "snps,dwmac"; reg = <0xc9410000 0x10000 diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index b4c5fdd7b451..17a4c6255589 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -292,3 +292,27 @@ &uart_C { clocks = <&clkc CLKID_CLK81>; }; + +&usb0 { + compatible = "amlogic,meson8-usb", "snps,dwc2"; + clocks = <&clkc CLKID_USB0_DDR_BRIDGE>; + clock-names = "otg"; +}; + +&usb1 { + compatible = "amlogic,meson8-usb", "snps,dwc2"; + clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; + clock-names = "otg"; +}; + +&usb0_phy { + compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy"; + clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>; + clock-names = "usb_general", "usb"; +}; + +&usb1_phy { + compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy"; + clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>; + clock-names = "usb_general", "usb"; +}; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index a9d7074e6369..521be5dfa8ef 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -206,3 +206,29 @@ &uart_C { clocks = <&clkc CLKID_CLK81>; }; + +&usb0 { + compatible = "amlogic,meson8b-usb", "snps,dwc2"; + clocks = <&clkc CLKID_USB0_DDR_BRIDGE>; + clock-names = "otg"; +}; + +&usb1 { + compatible = "amlogic,meson8b-usb", "snps,dwc2"; + clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; + clock-names = "otg"; +}; + +&usb0_phy { + compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy"; + clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>; + clock-names = "usb_general", "usb"; + resets = <&reset RESET_USB_OTG>; +}; + +&usb1_phy { + compatible = "amlogic,meson8b-usb2-phy", "amlogic,meson-mx-usb2-phy"; + clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>; + clock-names = "usb_general", "usb"; + resets = <&reset RESET_USB_OTG>; +}; From d8dd3d29d02cb04f37098b10ede5251764f06754 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 15 Jun 2017 23:33:51 +0200 Subject: [PATCH 21/22] ARM: dts: meson8b: add the SCU device node Amlogic's Meson8b SoC has a Snoop Control Unit (SCU), just like many other Cortex-A5 SoCs. Add the corresponding devicetree node so it can be used during SMP boot. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8.dtsi | 5 +++++ arch/arm/boot/dts/meson8b.dtsi | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 17a4c6255589..dfe83364eceb 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -110,6 +110,11 @@ no-map; }; }; + + scu@c4300000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xc4300000 0x100>; + }; }; /* end of / */ &aobus { diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 521be5dfa8ef..173b12a999e6 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -82,6 +82,11 @@ reg = <0x203>; }; }; + + scu@c4300000 { + compatible = "arm,cortex-a5-scu"; + reg = <0xc4300000 0x100>; + }; }; /* end of / */ &aobus { From f28d4bdb74b6fec482cdbba032369a185baa74b9 Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Thu, 15 Jun 2017 23:33:52 +0200 Subject: [PATCH 22/22] ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b Until now clk81 was used as gate clock for the ethernet controller on Meson8 whereas Meson8b did not configure a gate clock at all. Use CLKID_ETH for both SoCs, which is the real gate clock for the ethernet controller. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm/boot/dts/meson8.dtsi | 2 +- arch/arm/boot/dts/meson8b.dtsi | 5 +++++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index dfe83364eceb..cada35828931 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -242,7 +242,7 @@ }; ðmac { - clocks = <&clkc CLKID_CLK81>; + clocks = <&clkc CLKID_ETH>; clock-names = "stmmaceth"; }; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 173b12a999e6..72e4f425f190 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -176,6 +176,11 @@ }; }; +ðmac { + clocks = <&clkc CLKID_ETH>; + clock-names = "stmmaceth"; +}; + &hwrng { compatible = "amlogic,meson8b-rng", "amlogic,meson-rng"; clocks = <&clkc CLKID_RNG0>;