Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer updates from Thomas Gleixner:
"A rather large update for timers/timekeeping:
- compat syscall consolidation (Al Viro)
- Posix timer consolidation (Christoph Helwig / Thomas Gleixner)
- Cleanup of the device tree based initialization for clockevents and
clocksources (Daniel Lezcano)
- Consolidation of the FTTMR010 clocksource/event driver (Linus
Walleij)
- The usual set of small fixes and updates all over the place"
* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (93 commits)
timers: Make the cpu base lock raw
clocksource/drivers/mips-gic-timer: Fix an error code in 'gic_clocksource_of_init()'
clocksource/drivers/fsl_ftm_timer: Unmap region obtained by of_iomap
clocksource/drivers/tcb_clksrc: Make IO endian agnostic
clocksource/drivers/sun4i: Switch to the timer-of common init
clocksource/drivers/timer-of: Fix invalid iomap check
Revert "ktime: Simplify ktime_compare implementation"
clocksource/drivers: Fix uninitialized variable use in timer_of_init
kselftests: timers: Add test for frequency step
kselftests: timers: Fix inconsistency-check to not ignore first timestamp
time: Add warning about imminent deprecation of CONFIG_GENERIC_TIME_VSYSCALL_OLD
time: Clean up CLOCK_MONOTONIC_RAW time handling
posix-cpu-timers: Make timespec to nsec conversion safe
itimer: Make timeval to nsec conversion range limited
timers: Fix parameter description of try_to_del_timer_sync()
ktime: Simplify ktime_compare implementation
clocksource/drivers/fttmr010: Factor out clock read code
clocksource/drivers/fttmr010: Implement delay timer
clocksource/drivers: Add timer-of common init routine
clocksource/drivers/tcb_clksrc: Save timer context on suspend/resume
...
This commit is contained in:
@@ -337,7 +337,7 @@ config ARCH_MULTIPLATFORM
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select ARM_HAS_SG_CHAIN
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select ARM_PATCH_PHYS_VIRT
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select AUTO_ZRELADDR
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select CLKSRC_OF
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select TIMER_OF
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select COMMON_CLK
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select GENERIC_CLOCKEVENTS
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select MIGHT_HAVE_PCI
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@@ -351,7 +351,7 @@ config ARM_SINGLE_ARMV7M
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depends on !MMU
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select ARM_NVIC
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select AUTO_ZRELADDR
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select CLKSRC_OF
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select TIMER_OF
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select COMMON_CLK
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select CPU_V7M
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select GENERIC_CLOCKEVENTS
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@@ -532,7 +532,7 @@ config ARCH_PXA
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select CLKDEV_LOOKUP
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select CLKSRC_PXA
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select CLKSRC_MMIO
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select CLKSRC_OF
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select TIMER_OF
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select CPU_XSCALE if !CPU_XSC3
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select GENERIC_CLOCKEVENTS
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select GPIO_PXA
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@@ -571,7 +571,7 @@ config ARCH_SA1100
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select CLKSRC_PXA
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select CLKSRC_OF if OF
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select TIMER_OF if OF
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select CPU_FREQ
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select CPU_SA1100
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select GENERIC_CLOCKEVENTS
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@@ -1357,7 +1357,7 @@ config HAVE_ARM_ARCH_TIMER
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config HAVE_ARM_TWD
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bool
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select CLKSRC_OF if OF
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select TIMER_OF if OF
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help
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This options enables support for the ARM timer and watchdog unit
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@@ -893,6 +893,7 @@
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//interrupts = <16 17 18 35 36 37 38 39>;
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interrupts = <16>;
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clocks = <&clk_apb>;
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clock-names = "PCLK";
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};
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wdt1: wdt@1e785000 {
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@@ -1000,6 +1000,7 @@
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//interrupts = <16 17 18 35 36 37 38 39>;
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interrupts = <16>;
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clocks = <&clk_apb>;
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clock-names = "PCLK";
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};
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@@ -28,7 +28,6 @@ generic-y += segment.h
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generic-y += sembuf.h
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generic-y += serial.h
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generic-y += shmbuf.h
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generic-y += siginfo.h
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generic-y += simd.h
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generic-y += sizes.h
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generic-y += socket.h
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@@ -4,3 +4,5 @@ include include/uapi/asm-generic/Kbuild.asm
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genhdr-y += unistd-common.h
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genhdr-y += unistd-oabi.h
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genhdr-y += unistd-eabi.h
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generic-y += siginfo.h
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@@ -403,7 +403,7 @@ out:
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WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
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return err;
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}
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CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
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CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
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CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
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TIMER_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
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TIMER_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
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TIMER_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
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#endif
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@@ -120,6 +120,6 @@ void __init time_init(void)
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#ifdef CONFIG_COMMON_CLK
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of_clk_init(NULL);
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#endif
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clocksource_probe();
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timer_probe();
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}
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}
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@@ -4,7 +4,7 @@ menuconfig ARCH_ASPEED
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select SRAM
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select WATCHDOG
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select ASPEED_WATCHDOG
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select MOXART_TIMER
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select FTTMR010_TIMER
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select MFD_SYSCON
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select PINCTRL
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help
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@@ -150,7 +150,7 @@ config ARCH_BCM2835
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select ARM_ERRATA_411920 if ARCH_MULTI_V6
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select ARM_TIMER_SP804
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select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7
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select CLKSRC_OF
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select TIMER_OF
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select BCM2835_TIMER
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select PINCTRL
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select PINCTRL_BCM2835
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@@ -2,7 +2,7 @@ menuconfig ARCH_CLPS711X
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bool "Cirrus Logic EP721x/EP731x-based"
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depends on ARCH_MULTI_V4T
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select AUTO_ZRELADDR
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select CLKSRC_OF
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select TIMER_OF
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select CLPS711X_TIMER
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select COMMON_CLK
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select CPU_ARM720T
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@@ -41,7 +41,7 @@ static void __init mediatek_timer_init(void)
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}
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of_clk_init(NULL);
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clocksource_probe();
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timer_probe();
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};
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static const char * const mediatek_board_dt_compat[] = {
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@@ -4,7 +4,7 @@ menuconfig ARCH_MOXART
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select CPU_FA526
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select ARM_DMA_MEM_BUFFERABLE
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select FARADAY_FTINTC010
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select MOXART_TIMER
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select FTTMR010_TIMER
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select GPIOLIB
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select PHYLIB if NETDEVICES
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help
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@@ -497,7 +497,7 @@ void __init omap_init_time(void)
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__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
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2, "timer_sys_ck", NULL, false);
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clocksource_probe();
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timer_probe();
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}
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#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
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@@ -506,7 +506,7 @@ void __init omap3_secure_sync32k_timer_init(void)
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__omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure",
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2, "timer_sys_ck", NULL, false);
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clocksource_probe();
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timer_probe();
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}
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#endif /* CONFIG_ARCH_OMAP3 */
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@@ -517,7 +517,7 @@ void __init omap3_gptimer_timer_init(void)
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__omap_sync32k_timer_init(2, "timer_sys_ck", NULL,
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1, "timer_sys_ck", "ti,timer-alwon", true);
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if (of_have_populated_dt())
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clocksource_probe();
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timer_probe();
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}
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#endif
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@@ -532,7 +532,7 @@ static void __init omap4_sync32k_timer_init(void)
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void __init omap4_local_timer_init(void)
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{
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omap4_sync32k_timer_init();
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clocksource_probe();
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timer_probe();
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}
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#endif
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@@ -656,7 +656,7 @@ void __init omap5_realtime_timer_init(void)
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omap4_sync32k_timer_init();
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realtime_counter_init();
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clocksource_probe();
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timer_probe();
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}
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#endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */
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@@ -55,7 +55,7 @@ static void __init rockchip_timer_init(void)
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}
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of_clk_init(NULL);
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clocksource_probe();
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timer_probe();
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}
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static void __init rockchip_dt_init(void)
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@@ -394,7 +394,7 @@ config MACH_SMDK2416
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config MACH_S3C2416_DT
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bool "Samsung S3C2416 machine using devicetree"
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select CLKSRC_OF
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select TIMER_OF
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select USE_OF
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select PINCTRL
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select PINCTRL_S3C24XX
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@@ -336,7 +336,7 @@ config MACH_WLF_CRAGG_6410
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config MACH_S3C64XX_DT
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bool "Samsung S3C6400/S3C6410 machine using Device Tree"
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select CLKSRC_OF
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select TIMER_OF
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select CPU_S3C6400
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select CPU_S3C6410
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select PINCTRL
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@@ -113,7 +113,7 @@ void __init rcar_gen2_timer_init(void)
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#endif /* CONFIG_ARM_ARCH_TIMER */
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of_clk_init(NULL);
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clocksource_probe();
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timer_probe();
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}
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struct memory_reserve_config {
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@@ -124,5 +124,5 @@ void __init spear13xx_timer_init(void)
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clk_put(pclk);
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spear_setup_of_timer();
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clocksource_probe();
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timer_probe();
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}
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@@ -42,7 +42,7 @@ static void __init sun6i_timer_init(void)
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of_clk_init(NULL);
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if (IS_ENABLED(CONFIG_RESET_CONTROLLER))
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sun6i_reset_init();
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clocksource_probe();
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timer_probe();
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}
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DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family")
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@@ -407,7 +407,7 @@ static const char * u300_board_compat[] = {
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DT_MACHINE_START(U300_DT, "U300 S335/B335 (Device Tree)")
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.map_io = u300_map_io,
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.init_irq = u300_init_irq_dt,
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.init_time = clocksource_probe,
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.init_time = timer_probe,
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.init_machine = u300_init_machine_dt,
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.restart = u300_restart,
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.dt_compat = u300_board_compat,
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@@ -150,7 +150,7 @@ static void __init zynq_timer_init(void)
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{
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zynq_clock_init();
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of_clk_init(NULL);
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clocksource_probe();
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timer_probe();
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}
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static struct map_desc zynq_cortex_a9_scu_map __initdata = {
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