sugar/linux
1
0
Fork 0
Code Activity

Merge tag 'v4.2-rc7' into drm-next

Browse Source 
Linux 4.2-rc7

Backmerge master for i915 fixes
This commit is contained in:
Dave Airlie
2015-08-17 14:13:53 +10:00
parent 8f9cb50789 2c6625cd54
commit 4eebf60b74
825 changed files with 9359 additions and 5262 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
include/uapi/drm/amdgpu_drm.h
View File

@@ -32,7 +32,7 @@
#ifndef __AMDGPU_DRM_H__
#define __AMDGPU_DRM_H__
#include <drm/drm.h>
#include "drm.h"
#define DRM_AMDGPU_GEM_CREATE 0x00
#define DRM_AMDGPU_GEM_MMAP 0x01
@@ -614,6 +614,8 @@ struct drm_amdgpu_info_device {
uint32_t vram_type;
/** video memory bit width*/
uint32_t vram_bit_width;
/* vce harvesting instance */
uint32_t vce_harvest_config;
};
struct drm_amdgpu_info_hw_ip {

8
include/uapi/drm/i915_drm.h
View File

@@ -1081,6 +1081,14 @@ struct drm_i915_reg_read {
__u64 offset;
__u64 val; /* Return value */
};
/* Known registers:
*
* Render engine timestamp - 0x2358 + 64bit - gen7+
* - Note this register returns an invalid value if using the default
* single instruction 8byte read, in order to workaround that use
* offset (0x2538 | 1) instead.
*
*/
struct drm_i915_reset_stats {
__u32 ctx_id;

2
include/uapi/drm/radeon_drm.h
View File

@@ -33,7 +33,7 @@
#ifndef __RADEON_DRM_H__
#define __RADEON_DRM_H__
#include <drm/drm.h>
#include "drm.h"
/* WARNING: If you change any of these defines, make sure to change the
* defines in the X server file (radeon_sarea.h)

1
include/uapi/linux/pci_regs.h
View File

@@ -319,6 +319,7 @@
#define PCI_MSIX_PBA 8 /* Pending Bit Array offset */
#define PCI_MSIX_PBA_BIR 0x00000007 /* BAR index */
#define PCI_MSIX_PBA_OFFSET 0xfffffff8 /* Offset into specified BAR */
#define PCI_MSIX_FLAGS_BIRMASK PCI_MSIX_PBA_BIR /* deprecated */
#define PCI_CAP_MSIX_SIZEOF 12 /* size of MSIX registers */
/* MSI-X Table entry format */

16
include/uapi/linux/virtio_net.h
View File

@@ -34,6 +34,7 @@
/* The feature bitmap for virtio net */
#define VIRTIO_NET_F_CSUM 0 /* Host handles pkts w/ partial csum */
#define VIRTIO_NET_F_GUEST_CSUM 1 /* Guest handles pkts w/ partial csum */
#define VIRTIO_NET_F_CTRL_GUEST_OFFLOADS 2 /* Dynamic offload configuration. */
#define VIRTIO_NET_F_MAC 5 /* Host has given MAC address. */
#define VIRTIO_NET_F_GUEST_TSO4 7 /* Guest can handle TSOv4 in. */
#define VIRTIO_NET_F_GUEST_TSO6 8 /* Guest can handle TSOv6 in. */
@@ -226,4 +227,19 @@ struct virtio_net_ctrl_mq {
#define VIRTIO_NET_CTRL_MQ_VQ_PAIRS_MIN 1
#define VIRTIO_NET_CTRL_MQ_VQ_PAIRS_MAX 0x8000
/*
* Control network offloads
*
* Reconfigures the network offloads that Guest can handle.
*
* Available with the VIRTIO_NET_F_CTRL_GUEST_OFFLOADS feature bit.
*
* Command data format matches the feature bit mask exactly.
*
* See VIRTIO_NET_F_GUEST_* for the list of offloads
* that can be enabled/disabled.
*/
#define VIRTIO_NET_CTRL_GUEST_OFFLOADS 5
#define VIRTIO_NET_CTRL_GUEST_OFFLOADS_SET 0
#endif /* _LINUX_VIRTIO_NET_H */

6
include/uapi/linux/virtio_pci.h
View File

@@ -157,6 +157,12 @@ struct virtio_pci_common_cfg {
__le32 queue_used_hi; /* read-write */
};
/* Fields in VIRTIO_PCI_CAP_PCI_CFG: */
struct virtio_pci_cfg_cap {
struct virtio_pci_cap cap;
__u8 pci_cfg_data[4]; /* Data for BAR access. */
};
/* Macro versions of offsets for the Old Timers! */
#define VIRTIO_PCI_CAP_VNDR 0
#define VIRTIO_PCI_CAP_NEXT 1

5
include/uapi/linux/virtio_ring.h
View File

@@ -31,6 +31,9 @@
* SUCH DAMAGE.
*
* Copyright Rusty Russell IBM Corporation 2007. */
#ifndef __KERNEL__
#include <stdint.h>
#endif
#include <linux/types.h>
#include <linux/virtio_types.h>
@@ -143,7 +146,7 @@ static inline void vring_init(struct vring *vr, unsigned int num, void *p,
vr->num = num;
vr->desc = p;
vr->avail = p + num*sizeof(struct vring_desc);
vr->used = (void *)(((unsigned long)&vr->avail->ring[num] + sizeof(__virtio16)
vr->used = (void *)(((uintptr_t)&vr->avail->ring[num] + sizeof(__virtio16)
+ align-1) & ~(align - 1));
}

39
include/uapi/sound/asoc.h
View File

@@ -77,7 +77,7 @@
#define SND_SOC_TPLG_NUM_TEXTS 16
/* ABI version */
#define SND_SOC_TPLG_ABI_VERSION 0x2
#define SND_SOC_TPLG_ABI_VERSION 0x3
/* Max size of TLV data */
#define SND_SOC_TPLG_TLV_SIZE 32
@@ -97,7 +97,8 @@
#define SND_SOC_TPLG_TYPE_PCM 7
#define SND_SOC_TPLG_TYPE_MANIFEST 8
#define SND_SOC_TPLG_TYPE_CODEC_LINK 9
#define SND_SOC_TPLG_TYPE_MAX SND_SOC_TPLG_TYPE_CODEC_LINK
#define SND_SOC_TPLG_TYPE_PDATA 10
#define SND_SOC_TPLG_TYPE_MAX SND_SOC_TPLG_TYPE_PDATA
/* vendor block IDs - please add new vendor types to end */
#define SND_SOC_TPLG_TYPE_VENDOR_FW 1000
@@ -110,7 +111,7 @@
/*
* Block Header.
* This header preceeds all object and object arrays below.
* This header precedes all object and object arrays below.
*/
struct snd_soc_tplg_hdr {
__le32 magic; /* magic number */
@@ -137,11 +138,19 @@ struct snd_soc_tplg_private {
/*
* Kcontrol TLV data.
*/
struct snd_soc_tplg_tlv_dbscale {
__le32 min;
__le32 step;
__le32 mute;
} __attribute__((packed));
struct snd_soc_tplg_ctl_tlv {
__le32 size; /* in bytes aligned to 4 */
__le32 numid; /* control element numeric identification */
__le32 count; /* number of elem in data array */
__le32 data[SND_SOC_TPLG_TLV_SIZE];
__le32 size; /* in bytes of this structure */
__le32 type; /* SNDRV_CTL_TLVT_*, type of TLV */
union {
__le32 data[SND_SOC_TPLG_TLV_SIZE];
struct snd_soc_tplg_tlv_dbscale scale;
};
} __attribute__((packed));
/*
@@ -155,9 +164,11 @@ struct snd_soc_tplg_channel {
} __attribute__((packed));
/*
* Kcontrol Operations IDs
* Genericl Operations IDs, for binding Kcontrol or Bytes ext ops
* Kcontrol ops need get/put/info.
* Bytes ext ops need get/put.
*/
struct snd_soc_tplg_kcontrol_ops_id {
struct snd_soc_tplg_io_ops {
__le32 get;
__le32 put;
__le32 info;
@@ -171,8 +182,8 @@ struct snd_soc_tplg_ctl_hdr {
__le32 type;
char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
__le32 access;
struct snd_soc_tplg_kcontrol_ops_id ops;
__le32 tlv_size; /* non zero means control has TLV data */
struct snd_soc_tplg_io_ops ops;
struct snd_soc_tplg_ctl_tlv tlv;
} __attribute__((packed));
/*
@@ -222,7 +233,7 @@ struct snd_soc_tplg_stream_config {
/*
* Manifest. List totals for each payload type. Not used in parsing, but will
* be passed to the component driver before any other objects in order for any
* global componnent resource allocations.
* global component resource allocations.
*
* File block representation for manifest :-
* +-----------------------------------+----+
@@ -238,6 +249,7 @@ struct snd_soc_tplg_manifest {
__le32 graph_elems; /* number of graph elements */
__le32 dai_elems; /* number of DAI elements */
__le32 dai_link_elems; /* number of DAI link elements */
struct snd_soc_tplg_private priv;
} __attribute__((packed));
/*
@@ -259,7 +271,6 @@ struct snd_soc_tplg_mixer_control {
__le32 invert;
__le32 num_channels;
struct snd_soc_tplg_channel channel[SND_SOC_TPLG_MAX_CHAN];
struct snd_soc_tplg_ctl_tlv tlv;
struct snd_soc_tplg_private priv;
} __attribute__((packed));
@@ -303,6 +314,7 @@ struct snd_soc_tplg_bytes_control {
__le32 mask;
__le32 base;
__le32 num_regs;
struct snd_soc_tplg_io_ops ext_ops;
struct snd_soc_tplg_private priv;
} __attribute__((packed));
@@ -347,6 +359,7 @@ struct snd_soc_tplg_dapm_widget {
__le32 reg; /* negative reg = no direct dapm */
__le32 shift; /* bits to shift */
__le32 mask; /* non-shifted mask */
__le32 subseq; /* sort within widget type */
__u32 invert; /* invert the power bit */
__u32 ignore_suspend; /* kept enabled over suspend */
__u16 event_flags;