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MN10300: Make the boot wrapper able to use writeback caching

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Make the boot wrapper able to use writeback caching, including flushing the
cache before jumping to the main kernel.

Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
This commit is contained in:
Akira Takeuchi
2010-10-27 17:28:47 +01:00
committed by David Howells
parent 8be0628923
commit 633171861a
1 changed files with 48 additions and 1 deletions
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49
arch/mn10300/boot/compressed/head.S
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@@ -14,6 +14,7 @@
#include <linux/linkage.h> #include <linux/linkage.h>
#include <asm/cpu-regs.h> #include <asm/cpu-regs.h>
#include <asm/cache.h>
.globl startup_32 .globl startup_32
startup_32: startup_32:
@@ -37,8 +38,15 @@ startup_32:
mov (a0),d0 mov (a0),d0
btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
lne lne
mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD,d0 # writethru dcache
#ifdef CONFIG_MN10300_CACHE_ENABLED
#ifdef CONFIG_MN10300_CACHE_WBACK
mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK,d0
#else
mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRTHROUGH,d0
#endif /* WBACK */
movhu d0,(a0) # enable movhu d0,(a0) # enable
#endif /* !ENABLED */
# clear the BSS area # clear the BSS area
mov __bss_start,a0 mov __bss_start,a0
@@ -54,6 +62,9 @@ bssclear_end:
# decompress the kernel # decompress the kernel
call decompress_kernel[],0 call decompress_kernel[],0
#ifdef CONFIG_MN10300_CACHE_WBACK
call mn10300_dcache_flush_inv[],0
#endif
# disable caches again # disable caches again
mov CHCTR,a0 mov CHCTR,a0
@@ -69,10 +80,46 @@ bssclear_end:
mov (4,a0),d1 mov (4,a0),d1
mov (8,a0),d2 mov (8,a0),d2
# jump to the kernel proper entry point
mov a3,sp mov a3,sp
mov CONFIG_KERNEL_TEXT_ADDRESS,a0 mov CONFIG_KERNEL_TEXT_ADDRESS,a0
jmp (a0) jmp (a0)
###############################################################################
#
# Cache flush routines
#
###############################################################################
#ifdef CONFIG_MN10300_CACHE_WBACK
mn10300_dcache_flush_inv:
movhu (CHCTR),d0
btst CHCTR_DCEN,d0
beq mn10300_dcache_flush_inv_end
mov L1_CACHE_NENTRIES,d1
clr a1
mn10300_dcache_flush_inv_loop:
mov (DCACHE_PURGE_WAY0(0),a1),d0 # unconditional purge
mov (DCACHE_PURGE_WAY1(0),a1),d0 # unconditional purge
mov (DCACHE_PURGE_WAY2(0),a1),d0 # unconditional purge
mov (DCACHE_PURGE_WAY3(0),a1),d0 # unconditional purge
add L1_CACHE_BYTES,a1
add -1,d1
bne mn10300_dcache_flush_inv_loop
mn10300_dcache_flush_inv_end:
ret [],0
#endif /* CONFIG_MN10300_CACHE_WBACK */
###############################################################################
#
# Data areas
#
###############################################################################
.data .data
.align 4 .align 4
param_save_area: param_save_area: