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MAINTAINERS: rename Microchip RISC-V entry

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There's now non-FPGA RISC-V SoCs from Microchip, so rename the entry
to reflect that.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Conor Dooley
2025-11-10 11:23:54 +00:00
parent 587c0a5e81
commit 66c6ceb41e
1 changed files with 1 additions and 1 deletions
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@@ -22079,7 +22079,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux.git
F: Documentation/devicetree/bindings/iommu/riscv,iommu.yaml F: Documentation/devicetree/bindings/iommu/riscv,iommu.yaml
F: drivers/iommu/riscv/ F: drivers/iommu/riscv/
RISC-V MICROCHIP FPGA SUPPORT RISC-V MICROCHIP SUPPORT
M: Conor Dooley <conor.dooley@microchip.com> M: Conor Dooley <conor.dooley@microchip.com>
M: Daire McNamara <daire.mcnamara@microchip.com> M: Daire McNamara <daire.mcnamara@microchip.com>
L: linux-riscv@lists.infradead.org L: linux-riscv@lists.infradead.org