ARM: 7502/1: contextidr: avoid using bfi instruction during notifier
The bfi instruction is not available on ARMv6, so instead use an and/orr sequence in the contextidr_notifier. This gets rid of the assembler error: Assembler messages: Error: selected processor does not support ARM mode `bfi r3,r2,#0,#8' Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King
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dbece45894
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ae3790b8a9
@@ -63,10 +63,11 @@ static int contextidr_notifier(struct notifier_block *unused, unsigned long cmd,
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pid = task_pid_nr(thread->task) << ASID_BITS;
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pid = task_pid_nr(thread->task) << ASID_BITS;
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asm volatile(
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asm volatile(
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" mrc p15, 0, %0, c13, c0, 1\n"
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" mrc p15, 0, %0, c13, c0, 1\n"
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" bfi %1, %0, #0, %2\n"
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" and %0, %0, %2\n"
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" mcr p15, 0, %1, c13, c0, 1\n"
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" orr %0, %0, %1\n"
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" mcr p15, 0, %0, c13, c0, 1\n"
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: "=r" (contextidr), "+r" (pid)
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: "=r" (contextidr), "+r" (pid)
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: "I" (ASID_BITS));
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: "I" (~ASID_MASK));
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isb();
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isb();
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return NOTIFY_OK;
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return NOTIFY_OK;
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