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PCI: aerdrv: redefine PCI_ERR_ROOT_*_SRC

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The Error Source Identification Register (Offset 34h) is 4 byte
which contains a couple of 2 byte field, "[15:0] ERR_COR Source
Identification" and "[31:16] ERR_FATAL/NONFATAL Source Identification."

This patch defines PCI_ERR_ROOT_ERR_SRC to make dword access sensible.

Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
Hidetoshi Seto
2010-04-15 13:17:33 +09:00
committed by Jesse Barnes
parent 17e21854bd
commit f647a44f57
3 changed files with 3 additions and 4 deletions
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2
drivers/pci/pcie/aer/aerdrv.c
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@@ -210,7 +210,7 @@ irqreturn_t aer_irq(int irq, void *context)
}
/* Read error source and clear error status */
pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_COR_SRC, &id);
pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_ERR_SRC, &id);
pci_write_config_dword(pdev->port, pos + PCI_ERR_ROOT_STATUS, status);
/* Store error source for later DPC handler */