For example migration between Westmere and Nehelem hosts, caught in big real mode.
The code that fixes the segments for real mode guest was moved from enter_rmode
to vmx_set_segments. enter_rmode calls vmx_set_segments for each segment.
Signed-off-by: Orit Wasserman <owasserm@rehdat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
mmu_shrink() needlessly iterates over all VMs even though it will not
attempt to free mmu pages from more than one on them. Fix that and also
check used mmu pages count outside of VM lock to skip inactive VMs faster.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
The omapdss arch initialization code registers all the output devices as
omap_devices. However, DPI and SDI are not proper omap_devices, as they
do not have any corresponding HWMOD. This leads to crashes or problems
when the platform code tries to use omap_device functions for DPI and
SDI devices.
One such crash was reported by John Stultz <johnstul@us.ibm.com>:
[ 18.756835] Unable to handle kernel NULL pointer dereference at
virtual addr8
[ 18.765319] pgd = ea6b8000
[ 18.768188] [00000018] *pgd=aa942831, *pte=00000000, *ppte=00000000
[ 18.774749] Internal error: Oops: 17 [#1] SMP ARM
[ 18.779663] Modules linked in:
[ 18.782836] CPU: 0 Not tainted (3.5.0-rc1-dirty #456)
[ 18.788482] PC is at _od_resume_noirq+0x1c/0x78
[ 18.793212] LR is at _od_resume_noirq+0x6c/0x78
[ 18.797943] pc : [<c00307ec>] lr : [<c003083c>] psr: 20000113
[ 18.797943] sp : ec3abe80 ip : ec3abdb8 fp : 00000006
[ 18.809936] r10: ec1148b8 r9 : c08a48f0 r8 : c00307d0
[ 18.815368] r7 : 00000000 r6 : 00000000 r5 : ec114800 r4 :
ec114808
[ 18.822174] r3 : 00000000 r2 : 00000000 r1 : ec154fe8 r0 :
00000006
[ 18.829010] Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM
Segment user
[ 18.836456] Control: 10c5387d Table: aa6b804a DAC: 00000015
[ 18.842437] Process sh (pid: 1139, stack limit = 0xec3aa2f0)
[ 18.848358] Stack: (0xec3abe80 to 0xec3ac000)
DPI and SDI can be plain platform_devices. This patch changes the
registration from omap_device_register() to platform_device_add().
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reported-by: John Stultz <johnstul@us.ibm.com>
Tested-by: Jean Pihet <jean.pihet@newoldbits.com>
Practically all patches to ia64 KVM are build fixes; numerous warnings remain;
the last patch from the maintainer was committed more than three years ago. It
is clear that no one is using this thing.
Mark as BROKEN to ensure people don't get hit by pointless build problems.
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
lpage_info is created for each large level even when the memory slot is
not for RAM. This means that when we add one slot for a PCI device, we
end up allocating at least KVM_NR_PAGE_SIZES - 1 pages by vmalloc().
To make things worse, there is an increasing number of devices which
would result in more pages being wasted this way.
This patch mitigates this problem by using kvm_kvzalloc().
Signed-off-by: Takuya Yoshikawa <yoshikawa.takuya@oss.ntt.co.jp>
Signed-off-by: Avi Kivity <avi@redhat.com>
Use sigp order code defines in assembly code as well.
With this change all places that use sigp constants should
have been converted to use self describing defines instead
of directly using constants.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
The smp and the kvm code have different defines for the sigp order codes.
Let's just have a single place where these are defined.
Also move the sigp condition code and sigp cpu status bits to the new
sigp.h header file.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
condition code "status stored" for sigp sense running always implies
that only the "not running" status bit is set. Therefore no need to
check if it is set.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
After
commit 5e8010cb50
s390: replace TIF_SIE with PF_VCPU
there is no need to load the thread info before sie_loop where
it is also loaded.
Get rid of this duplicate instruction.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
The commit (bce492c0 ARM: OMAP2+: UART: Fix incorrect population of
default uart pads) removed default uart pads that where getting populated
and which was making rx pin wakeup capable. If uart pads were used in
different mode by any other module then it would fail since the default
pads took over all the uart pins forcefully. With removal of default pads
the rx_pad wakeup for console uart while waking up from off mode is broken.
Utilise the mux api available to probe the availability of mux pins
in uart mode and probe for availability of uart pin in mux mode0
if uart is available as uart pin itself then configure rx pin
as wakeup capable.
This patch itself doesn't cater to all boards. Boards using uart rx wakeup
mechanism should ensure the usage of omap_serial_init_port by configuring
required uart ports and pass necessary mux data, till then this probing of
uart pins can cater to enabling of rx pad wakeup to most of the boards.
This patch can also throw some boot warning from _omap_mux_get_by_name
if pin is requested for availability is not present while dynamically probing
the uart pins availability such boot warnings can be addressed only when board
files are patched with omap_serial_init_port calls passing the right pads
needed for a given port.
Discussion Threads for reference:
http://www.spinics.net/lists/linux-omap/msg69859.htmlhttp://www.spinics.net/lists/linux-omap/msg68659.html
Cc: Felipe Balbi <balbi@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Russ Dill <russ.dill@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Ameya Palande <ameya.palande@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
[tony@atomide.com: updated to fix compile when CONFIG_OMAP_MUX is not set]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds minimal support for AM335X machine init.
During last merge window, two separate patches supporting am33xx
machine init had been submitted,
1. Link to earlier Baseport patch submission (Legacy):
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg59325.html
2. Link to earlier DT based machine init support patch submission:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg61398.html
And both had got accepted at that time, but got missed during
merge window.
But now, since we have taken decision to make am33xx as a separate
class and not to follow omap3 family, these patches needs to changes
accordingly (only changes),
- Combine both the patches, since early init and timer init
used in board-generic.c file requires them.
- Remove dependency on AM3517EVM, and only use DT approach
for machine init.
- Change the config option (as changed recently)
CONFIG_SOC_OMAPAM33XX --> CONFIG_SOC_AM33XX
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Some GPIOs in Visstrim M10 are used without being registered.
This leads to USB and video malfunctions. This patch registers
those GPIOs to solve the issue.
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for low level debugging on AM335X EVM (AM33XX family).
Currently only support for UART1 console, which is used on AM335X EVM
is added.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add basic imx6q cpuidle driver. For now, only basic WFI state is
supported. Deeper idle states will be added in the future.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add common cpuidle init functionality that can be used by various
imx platforms.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add various functionality needed to enable a imx53 low power idle
state. This includes adding the imx53 gpc_dvfs clock and making a
common imx5_late_init function and initializing all imx53
MACHINE_STATE late_init calls to imx5_late_init.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The imx5 idle code that existed in mm-imx5.c is moved to pm-imx5.c.
The imx5_pm_init call is now exported and called during the
MACHINE_START late_init in supported imx5 platforms.
Remove various enabling/disabling of the gpc_dvfs clock and
enable it once during initialization. This is a very low
power clock that must be enabled during low power operations.
There are only two "suspend_state_t" imx5 low power modes ever
used. STOP_POWER_OFF for suspend to mem and
WAIT_UNCLOCKED_POWER_OFF for idle and suspend to standby. The
latter mode only requires 500 nanoseconds of extra hardware
exit time beyond a basic WFI operation (WAIT_CLOCKED mode) so
no other idle mode is necessary. Given this information, it
is more efficient to keep the registers in the often used
WAIT_UNCLOCKED_POWER_OFF state and only to and from the
STOP_POWER_OFF register state as needed when suspend to
mem is required.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add additional comments to the tzic_enable_wake() funciton to
clarify its intended usage.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A change is needed in the IMX_IO_P2V macro to allow all imx5 platforms
to use common definitions when accessing registers of peripherals on
the AIPS2 bus. With this change, IMX_IO_P2V(MX50_AIPS2_BASE_ADDR) ==
IMX_IO_P2V(MX51_AIPS2_BASE_ADDR) == IMX_IO_P2V(MX53_AIPS2_BASE_ADDR).
This change was tested for mapping conflicts using the iop2v script
found at git://git.pengutronix.de/git/ukl/imx-iop2v.git and by
performing a bootup of a default build using imx_v6_v7_defconfig
on a imx51 babbage board and imx53 loco board. The comments were
modified to reflect the output given by the script which shows the
virtual address mappings.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sam broke this with
commit 1f2bfbd00e
Author: Sam Ravnborg <sam@ravnborg.org>
Date: Sat May 5 10:18:41 2012 +0200
kbuild: link of vmlinux moved to a script
But we should be deriving the location of libgcc in the same way as all
the other archs, so fix by adding a LIBGCC variable which is evaluated
in the makefile
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Linus broke us with
commit 36126f8f2e
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sat May 26 10:43:17 2012 -0700
word-at-a-time: make the interfaces truly generic
By moving functions defined in strncopy_from_user.c into the asm-geneic
version word-at-a-time.h. Spark and OpenRisc were fixed to use this, but
not parisc. Fix by adding to generic-y in asm/Kbuild
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Al viro broke us with
commit edd63a2763
Author: Al Viro <viro@zeniv.linux.org.uk>
Date: Fri Apr 27 13:42:45 2012 -0400
set_restore_sigmask() is never called without SIGPENDING (and never should be)
Although it's pretty much our fault since parisc's asm/bug.h uses
BUGWARN_TAINT but doesn't include the file that defines it. Fix that.
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Pull timer updates from Thomas Gleixner:
"The clocksource driver is pure hardware enablement and the skew option
is default off, well tested and non dangerous."
* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
tick: Move skew_tick option into the HIGH_RES_TIMER section
clocksource: em_sti: Add DT support
clocksource: em_sti: Emma Mobile STI driver
clockevents: Make clockevents_config() a global symbol
tick: Add tick skew boot option
in round_rate we made the assumption that we can set arbitrary
frequencies and thus returned the input rate. This is not correct,
for certain frequencies after setting a frequency with set_rate,
recalc_rate will return different values. To fix this, introduce
set_rate/recalc_rate functions which work on variables instead
of registers directly. This way we can call these in round_rate
to get the exact rate which we would get if we call set_rate
with this value.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX5 PLL has two different register sets for setting the
rate. One is used for the standard case and and is used for
DVFS. Which one of them is used depends on a hardware input
of the PLL. Current implementation reads back from the hardware
which setting is used. This is bogus: If we ever want to implement
DVFS we have to program both register sets and not only the one
which happens to be used at the moment. For now, just use the
standard register set uncondionally.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit 3b511201 (ARM: OMAP: rx51: Platform support for lis3lv02d accelerometer)
added support for lis3lv02d accelerometer.
The patch was still using OMAP_GPIO_IRQ which no longer exists.
Fix it by using gpio_to_irq().
Signed-off-by: Tony Lindgren <tony@atomide.com>
