1
0
Files
linux/drivers/gpio
Andrew Jeffery 5ae4cb94b3 gpio: aspeed: Add debounce support
Each GPIO in the Aspeed GPIO controller can choose one of four input
debounce states: to disable debouncing for an input, or select from one
of three programmable debounce timer values. Each GPIO in a
four-bank-set is assigned one bit in each of two debounce configuration
registers dedicated to the set, and selects a debounce state by
configuring the two bits to select one of the four options.

The limitation on debounce timer values is managed by mapping offsets
onto a configured timer value and keeping count of the number of users
a timer has. Timer values are configured on a first-come-first-served
basis.

A small twist in the hardware design is that the debounce configuration
register numbering is reversed with respect to the binary representation
of the debounce timer of interest (i.e. debounce register 1 represents
bit 1, and debounce register 2 represents bit 0 of the timer numbering).

Tested on an AST2500EVB with additional inspection under QEMU's
romulus-bmc machine.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-24 14:49:53 +02:00
..
2017-03-14 10:51:28 +01:00
2016-03-30 10:38:51 +02:00
2016-02-16 00:19:53 +01:00
2017-01-30 15:57:46 +01:00
2016-12-30 09:18:10 +01:00
2016-09-13 10:35:56 +02:00
2016-12-30 09:18:10 +01:00
2017-03-16 21:52:10 +01:00