Hawking Zhang bd08a8d9e8 drm/amdgpu/nbio6: Correct PCIE_INDEX/DATA pair used for smn register accessing ...

PCIE_INDEX2/DATA2 pair will be used for smn register accessing since from vega.
PCIE_INDEX/DATA pair should be reserved for smu

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2018-03-20 23:43:25 -05:00

..

drm

drm/amdgpu/nbio6: Correct PCIE_INDEX/DATA pair used for smn register accessing

2018-03-20 23:43:25 -05:00

host1x

gpu: host1x: Use IOMMU groups

2017-12-21 14:52:36 +01:00

ipu-v3

gpu: ipu-v3: allow to build with COMPILE_TEST

2017-12-19 12:49:11 +01:00

vga

vfs: do bulk POLL* -> EPOLL* replacement

2018-02-11 14:34:03 -08:00

Makefile

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