drm/i915/cx0: Replace XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_US with XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_MS
There was a completely unjustified change to the cx0 powerdown timeout, and the way it was done now prevents future conversion to poll_timeout_us(). Assuming there was some reason the bigger timeout let's nuke the old short timeout (XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_US) nd replace it with the bigger timeout (XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_MS). For consistency with intel_wait_for_register() we'll stick to the default 2 usec for the fast timeout. v2: Go for the longer (ms) timeout in case it actually matters v3: Note the defaullt 2 usec fast timeout (Jani) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20251106152049.21115-5-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
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@@ -2830,7 +2830,7 @@ void intel_cx0_powerdown_change_sequence(struct intel_encoder *encoder,
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/* Update Timeout Value */
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if (intel_de_wait_custom(display, buf_ctl2_reg,
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intel_cx0_get_powerdown_update(lane_mask), 0,
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XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_US, 2, NULL))
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2, XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_MS, NULL))
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drm_warn(display->drm,
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"PHY %c failed to bring out of lane reset\n",
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phy_name(phy));
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@@ -80,7 +80,7 @@
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#define XELPDP_PCLK_PLL_DISABLE_TIMEOUT_US 20
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#define XELPDP_PORT_BUF_SOC_READY_TIMEOUT_US 100
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#define XELPDP_PORT_RESET_START_TIMEOUT_US 5
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#define XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_US 100
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#define XELPDP_PORT_POWERDOWN_UPDATE_TIMEOUT_MS 2
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#define XELPDP_PORT_RESET_END_TIMEOUT 15
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#define XELPDP_REFCLK_ENABLE_TIMEOUT_US 1
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