Merge tag 'amlogic-arm64-dt-for-v6.15-v2' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM64 DT changes for v6.15 (v2): - switch to the new PWM controller binding - Add gpio_intc node for Amlogic A4 & A5 SoCs * tag 'amlogic-arm64-dt-for-v6.15-v2' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: arm64: dts: Add gpio_intc node for Amlogic A5 SoCs arm64: dts: Add gpio_intc node for Amlogic A4 SoCs arm64: dts: amlogic: g12: switch to the new PWM controller binding arm64: dts: amlogic: axg: switch to the new PWM controller binding arm64: dts: amlogic: gx: switch to the new PWM controller binding Link: https://lore.kernel.org/r/f6fb1b2b-955d-4271-b772-0a75fdba1e48@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
@@ -48,3 +48,24 @@
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};
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};
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};
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&apb {
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gpio_intc: interrupt-controller@4080 {
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compatible = "amlogic,a4-gpio-intc",
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"amlogic,meson-gpio-intc";
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reg = <0x0 0x4080 0x0 0x20>;
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interrupt-controller;
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#interrupt-cells = <2>;
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amlogic,channel-interrupts =
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<10 11 12 13 14 15 16 17 18 19 20 21>;
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};
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gpio_ao_intc: interrupt-controller@8e72c {
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compatible = "amlogic,a4-gpio-ao-intc",
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"amlogic,meson-gpio-intc";
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reg = <0x0 0x8e72c 0x0 0x0c>;
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interrupt-controller;
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#interrupt-cells = <2>;
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amlogic,channel-interrupts = <140 141>;
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};
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};
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@@ -48,3 +48,15 @@
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};
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};
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};
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&apb {
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gpio_intc: interrupt-controller@4080 {
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compatible = "amlogic,a5-gpio-intc",
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"amlogic,meson-gpio-intc";
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reg = <0x0 0x4080 0x0 0x20>;
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interrupt-controller;
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#interrupt-cells = <2>;
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amlogic,channel-interrupts =
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<10 11 12 13 14 15 16 17 18 19 20 21>;
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};
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};
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@@ -1693,8 +1693,12 @@
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};
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pwm_AO_cd: pwm@2000 {
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compatible = "amlogic,meson-axg-ao-pwm";
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compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x02000 0x0 0x20>;
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clocks = <&xtal>,
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<&clkc_AO CLKID_AO_CLK81>,
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV5>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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@@ -1728,8 +1732,12 @@
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};
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pwm_AO_ab: pwm@7000 {
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compatible = "amlogic,meson-axg-ao-pwm";
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compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x07000 0x0 0x20>;
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clocks = <&xtal>,
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<&clkc_AO CLKID_AO_CLK81>,
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV5>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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@@ -1806,15 +1814,23 @@
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};
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pwm_ab: pwm@1b000 {
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compatible = "amlogic,meson-axg-ee-pwm";
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compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x1b000 0x0 0x20>;
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clocks = <&xtal>,
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<&clkc CLKID_FCLK_DIV5>,
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_cd: pwm@1a000 {
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compatible = "amlogic,meson-axg-ee-pwm";
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compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
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reg = <0x0 0x1a000 0x0 0x20>;
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clocks = <&xtal>,
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<&clkc CLKID_FCLK_DIV5>,
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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@@ -2060,8 +2060,11 @@
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};
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pwm_AO_cd: pwm@2000 {
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compatible = "amlogic,meson-g12a-ao-pwm-cd";
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compatible = "amlogic,meson-g12-pwm-v2",
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"amlogic,meson8-pwm-v2";
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reg = <0x0 0x2000 0x0 0x20>;
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clocks = <&xtal>,
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<&clkc_AO CLKID_AO_CLK81>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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@@ -2099,8 +2102,13 @@
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};
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pwm_AO_ab: pwm@7000 {
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compatible = "amlogic,meson-g12a-ao-pwm-ab";
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compatible = "amlogic,meson-g12-pwm-v2",
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"amlogic,meson8-pwm-v2";
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reg = <0x0 0x7000 0x0 0x20>;
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clocks = <&xtal>,
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<&clkc_AO CLKID_AO_CLK81>,
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV5>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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@@ -2301,22 +2309,37 @@
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};
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pwm_ef: pwm@19000 {
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compatible = "amlogic,meson-g12a-ee-pwm";
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compatible = "amlogic,meson-g12-pwm-v2",
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"amlogic,meson8-pwm-v2";
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reg = <0x0 0x19000 0x0 0x20>;
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clocks = <&xtal>,
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<>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_cd: pwm@1a000 {
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compatible = "amlogic,meson-g12a-ee-pwm";
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compatible = "amlogic,meson-g12-pwm-v2",
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"amlogic,meson8-pwm-v2";
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reg = <0x0 0x1a000 0x0 0x20>;
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clocks = <&xtal>,
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||||
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_ab: pwm@1b000 {
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compatible = "amlogic,meson-g12a-ee-pwm";
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compatible = "amlogic,meson-g12-pwm-v2",
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"amlogic,meson8-pwm-v2";
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reg = <0x0 0x1b000 0x0 0x20>;
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clocks = <&xtal>,
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<>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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@@ -346,8 +346,6 @@
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&pwm_AO_cd {
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pinctrl-0 = <&pwm_ao_d_e_pins>;
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pinctrl-names = "default";
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clocks = <&xtal>;
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clock-names = "clkin1";
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status = "okay";
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};
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@@ -355,8 +353,6 @@
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status = "okay";
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pinctrl-0 = <&pwm_e_pins>;
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pinctrl-names = "default";
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clocks = <&xtal>;
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clock-names = "clkin0";
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};
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&pdm {
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||||
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@@ -284,8 +284,6 @@
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&pwm_AO_cd {
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pinctrl-0 = <&pwm_ao_d_e_pins>;
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pinctrl-names = "default";
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clocks = <&xtal>;
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||||
clock-names = "clkin1";
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status = "okay";
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||||
};
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||||
@@ -293,8 +291,6 @@
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||||
status = "okay";
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||||
pinctrl-0 = <&pwm_e_pins>;
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||||
pinctrl-names = "default";
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clocks = <&xtal>;
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clock-names = "clkin0";
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||||
};
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&saradc {
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@@ -389,8 +389,6 @@
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&pwm_AO_cd {
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pinctrl-0 = <&pwm_ao_d_e_pins>;
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pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
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||||
status = "okay";
|
||||
};
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||||
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||||
@@ -398,8 +396,6 @@
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||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
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||||
clock-names = "clkin0";
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||||
};
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||||
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||||
&pdm {
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||||
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||||
@@ -502,8 +502,6 @@
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&pwm_AO_cd {
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||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
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||||
pinctrl-names = "default";
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clocks = <&xtal>;
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clock-names = "clkin1";
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||||
status = "okay";
|
||||
};
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||||
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@@ -328,8 +328,6 @@
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||||
&pwm_AO_cd {
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pinctrl-0 = <&pwm_ao_d_e_pins>;
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pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
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||||
status = "okay";
|
||||
};
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||||
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||||
@@ -363,8 +361,6 @@
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||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
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||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
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||||
&uart_A {
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@@ -116,6 +116,4 @@
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||||
&pwm_ab {
|
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pinctrl-0 = <&pwm_a_e_pins>, <&pwm_b_x7_pins>;
|
||||
clocks = <&xtal>, <&xtal>;
|
||||
clock-names = "clkin0", "clkin1";
|
||||
};
|
||||
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||||
@@ -257,8 +257,6 @@
|
||||
&pwm_ab {
|
||||
pinctrl-0 = <&pwm_a_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
@@ -273,8 +271,6 @@
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -367,8 +367,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_a_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
@@ -380,8 +378,6 @@
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -92,16 +92,12 @@
|
||||
&pwm_ab {
|
||||
pinctrl-0 = <&pwm_a_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -327,16 +327,12 @@
|
||||
&pwm_ab {
|
||||
pinctrl-0 = <&pwm_a_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -379,32 +379,24 @@
|
||||
&pwm_ab {
|
||||
pinctrl-0 = <&pwm_a_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_AO_ab {
|
||||
pinctrl-0 = <&pwm_ao_a_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -304,24 +304,18 @@
|
||||
&pwm_ab {
|
||||
pinctrl-0 = <&pwm_a_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -345,24 +345,18 @@
|
||||
&pwm_AO_ab {
|
||||
pinctrl-0 = <&pwm_ao_a_3_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_ab {
|
||||
pinctrl-0 = <&pwm_b_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -240,8 +240,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
|
||||
@@ -329,14 +329,14 @@
|
||||
};
|
||||
|
||||
pwm_ab: pwm@8550 {
|
||||
compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
|
||||
compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x08550 0x0 0x10>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm_cd: pwm@8650 {
|
||||
compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
|
||||
compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x08650 0x0 0x10>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
@@ -351,7 +351,7 @@
|
||||
};
|
||||
|
||||
pwm_ef: pwm@86c0 {
|
||||
compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
|
||||
compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x086c0 0x0 0x10>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
@@ -498,7 +498,7 @@
|
||||
};
|
||||
|
||||
pwm_AO_ab: pwm@550 {
|
||||
compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
|
||||
compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
|
||||
reg = <0x0 0x00550 0x0 0x10>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
|
||||
@@ -298,8 +298,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
|
||||
@@ -241,8 +241,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
/* Wireless SDIO Module */
|
||||
|
||||
@@ -150,8 +150,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
/* Wireless SDIO Module */
|
||||
|
||||
@@ -222,8 +222,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
|
||||
@@ -185,8 +185,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
|
||||
@@ -739,6 +739,31 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pwm_ab {
|
||||
clocks = <&xtal>,
|
||||
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
};
|
||||
|
||||
&pwm_AO_ab {
|
||||
clocks = <&xtal>, <&clkc CLKID_CLK81>;
|
||||
};
|
||||
|
||||
&pwm_cd {
|
||||
clocks = <&xtal>,
|
||||
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
clocks = <&xtal>,
|
||||
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
};
|
||||
|
||||
&pwrc {
|
||||
resets = <&reset RESET_VIU>,
|
||||
<&reset RESET_VENC>,
|
||||
|
||||
@@ -280,8 +280,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
/* This is connected to the Bluetooth module: */
|
||||
|
||||
@@ -116,8 +116,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
|
||||
@@ -115,8 +115,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
/* SD card */
|
||||
|
||||
@@ -211,8 +211,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal> , <&xtal>;
|
||||
clock-names = "clkin0", "clkin1" ;
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
|
||||
@@ -145,8 +145,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
/* Wireless SDIO Module */
|
||||
|
||||
@@ -101,8 +101,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
|
||||
@@ -809,6 +809,31 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pwm_ab {
|
||||
clocks = <&xtal>,
|
||||
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
};
|
||||
|
||||
&pwm_AO_ab {
|
||||
clocks = <&xtal>, <&clkc CLKID_CLK81>;
|
||||
};
|
||||
|
||||
&pwm_cd {
|
||||
clocks = <&xtal>,
|
||||
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
clocks = <&xtal>,
|
||||
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
|
||||
<&clkc CLKID_FCLK_DIV4>,
|
||||
<&clkc CLKID_FCLK_DIV3>;
|
||||
};
|
||||
|
||||
&pwrc {
|
||||
resets = <&reset RESET_VIU>,
|
||||
<&reset RESET_VENC>,
|
||||
|
||||
@@ -289,16 +289,12 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&pwm_ef {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&sd_emmc_a {
|
||||
|
||||
@@ -192,8 +192,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
/* Wireless SDIO Module */
|
||||
|
||||
@@ -458,24 +458,18 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
};
|
||||
|
||||
&pwm_ab {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_b_x7_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
};
|
||||
|
||||
&pwm_cd {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_d_x3_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
|
||||
@@ -199,15 +199,11 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_ao_a_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -215,8 +211,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
|
||||
@@ -367,8 +367,6 @@
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -78,8 +78,6 @@
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -392,8 +392,6 @@
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -435,15 +435,11 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_ao_a_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -451,8 +447,6 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
|
||||
Reference in New Issue
Block a user