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Merge tag 'amlogic-arm64-dt-for-v6.15-v2' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt

Amlogic ARM64 DT changes for v6.15 (v2):
- switch to the new PWM controller binding
- Add gpio_intc node for Amlogic A4 & A5 SoCs

* tag 'amlogic-arm64-dt-for-v6.15-v2' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  arm64: dts: Add gpio_intc node for Amlogic A5 SoCs
  arm64: dts: Add gpio_intc node for Amlogic A4 SoCs
  arm64: dts: amlogic: g12: switch to the new PWM controller binding
  arm64: dts: amlogic: axg: switch to the new PWM controller binding
  arm64: dts: amlogic: gx: switch to the new PWM controller binding

Link: https://lore.kernel.org/r/f6fb1b2b-955d-4271-b772-0a75fdba1e48@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2025-03-20 17:51:56 +01:00
40 changed files with 135 additions and 123 deletions

View File

@@ -48,3 +48,24 @@
};
};
};
&apb {
gpio_intc: interrupt-controller@4080 {
compatible = "amlogic,a4-gpio-intc",
"amlogic,meson-gpio-intc";
reg = <0x0 0x4080 0x0 0x20>;
interrupt-controller;
#interrupt-cells = <2>;
amlogic,channel-interrupts =
<10 11 12 13 14 15 16 17 18 19 20 21>;
};
gpio_ao_intc: interrupt-controller@8e72c {
compatible = "amlogic,a4-gpio-ao-intc",
"amlogic,meson-gpio-intc";
reg = <0x0 0x8e72c 0x0 0x0c>;
interrupt-controller;
#interrupt-cells = <2>;
amlogic,channel-interrupts = <140 141>;
};
};

View File

@@ -48,3 +48,15 @@
};
};
};
&apb {
gpio_intc: interrupt-controller@4080 {
compatible = "amlogic,a5-gpio-intc",
"amlogic,meson-gpio-intc";
reg = <0x0 0x4080 0x0 0x20>;
interrupt-controller;
#interrupt-cells = <2>;
amlogic,channel-interrupts =
<10 11 12 13 14 15 16 17 18 19 20 21>;
};
};

View File

@@ -1693,8 +1693,12 @@
};
pwm_AO_cd: pwm@2000 {
compatible = "amlogic,meson-axg-ao-pwm";
compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x02000 0x0 0x20>;
clocks = <&xtal>,
<&clkc_AO CLKID_AO_CLK81>,
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV5>;
#pwm-cells = <3>;
status = "disabled";
};
@@ -1728,8 +1732,12 @@
};
pwm_AO_ab: pwm@7000 {
compatible = "amlogic,meson-axg-ao-pwm";
compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x07000 0x0 0x20>;
clocks = <&xtal>,
<&clkc_AO CLKID_AO_CLK81>,
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV5>;
#pwm-cells = <3>;
status = "disabled";
};
@@ -1806,15 +1814,23 @@
};
pwm_ab: pwm@1b000 {
compatible = "amlogic,meson-axg-ee-pwm";
compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x1b000 0x0 0x20>;
clocks = <&xtal>,
<&clkc CLKID_FCLK_DIV5>,
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_cd: pwm@1a000 {
compatible = "amlogic,meson-axg-ee-pwm";
compatible = "amlogic,meson-axg-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x1a000 0x0 0x20>;
clocks = <&xtal>,
<&clkc CLKID_FCLK_DIV5>,
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
#pwm-cells = <3>;
status = "disabled";
};

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@@ -2060,8 +2060,11 @@
};
pwm_AO_cd: pwm@2000 {
compatible = "amlogic,meson-g12a-ao-pwm-cd";
compatible = "amlogic,meson-g12-pwm-v2",
"amlogic,meson8-pwm-v2";
reg = <0x0 0x2000 0x0 0x20>;
clocks = <&xtal>,
<&clkc_AO CLKID_AO_CLK81>;
#pwm-cells = <3>;
status = "disabled";
};
@@ -2099,8 +2102,13 @@
};
pwm_AO_ab: pwm@7000 {
compatible = "amlogic,meson-g12a-ao-pwm-ab";
compatible = "amlogic,meson-g12-pwm-v2",
"amlogic,meson8-pwm-v2";
reg = <0x0 0x7000 0x0 0x20>;
clocks = <&xtal>,
<&clkc_AO CLKID_AO_CLK81>,
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV5>;
#pwm-cells = <3>;
status = "disabled";
};
@@ -2301,22 +2309,37 @@
};
pwm_ef: pwm@19000 {
compatible = "amlogic,meson-g12a-ee-pwm";
compatible = "amlogic,meson-g12-pwm-v2",
"amlogic,meson8-pwm-v2";
reg = <0x0 0x19000 0x0 0x20>;
clocks = <&xtal>,
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_cd: pwm@1a000 {
compatible = "amlogic,meson-g12a-ee-pwm";
compatible = "amlogic,meson-g12-pwm-v2",
"amlogic,meson8-pwm-v2";
reg = <0x0 0x1a000 0x0 0x20>;
clocks = <&xtal>,
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_ab: pwm@1b000 {
compatible = "amlogic,meson-g12a-ee-pwm";
compatible = "amlogic,meson-g12-pwm-v2",
"amlogic,meson8-pwm-v2";
reg = <0x0 0x1b000 0x0 0x20>;
clocks = <&xtal>,
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
#pwm-cells = <3>;
status = "disabled";
};

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@@ -346,8 +346,6 @@
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
@@ -355,8 +353,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
};
&pdm {

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@@ -284,8 +284,6 @@
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
@@ -293,8 +291,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
};
&saradc {

View File

@@ -389,8 +389,6 @@
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
@@ -398,8 +396,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
};
&pdm {

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@@ -502,8 +502,6 @@
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};

View File

@@ -328,8 +328,6 @@
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
@@ -363,8 +361,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
};
&uart_A {

View File

@@ -116,6 +116,4 @@
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>, <&pwm_b_x7_pins>;
clocks = <&xtal>, <&xtal>;
clock-names = "clkin0", "clkin1";
};

View File

@@ -257,8 +257,6 @@
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
status = "okay";
};
@@ -273,8 +271,6 @@
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};

View File

@@ -367,8 +367,6 @@
status = "okay";
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
};
&pwm_ef {
@@ -380,8 +378,6 @@
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};

View File

@@ -92,16 +92,12 @@
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};

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@@ -327,16 +327,12 @@
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};

View File

@@ -379,32 +379,24 @@
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
status = "okay";
};
&pwm_AO_ab {
pinctrl-0 = <&pwm_ao_a_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};

View File

@@ -304,24 +304,18 @@
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
status = "okay";
};

View File

@@ -345,24 +345,18 @@
&pwm_AO_ab {
pinctrl-0 = <&pwm_ao_a_3_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
status = "okay";
};
&pwm_ab {
pinctrl-0 = <&pwm_b_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
status = "okay";
};

View File

@@ -240,8 +240,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
&saradc {

View File

@@ -329,14 +329,14 @@
};
pwm_ab: pwm@8550 {
compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x08550 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_cd: pwm@8650 {
compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x08650 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
@@ -351,7 +351,7 @@
};
pwm_ef: pwm@86c0 {
compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x086c0 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
@@ -498,7 +498,7 @@
};
pwm_AO_ab: pwm@550 {
compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
reg = <0x0 0x00550 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";

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@@ -298,8 +298,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
&saradc {

View File

@@ -241,8 +241,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
/* Wireless SDIO Module */

View File

@@ -150,8 +150,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
/* Wireless SDIO Module */

View File

@@ -222,8 +222,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
&saradc {

View File

@@ -185,8 +185,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
&saradc {

View File

@@ -739,6 +739,31 @@
};
};
&pwm_ab {
clocks = <&xtal>,
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
};
&pwm_AO_ab {
clocks = <&xtal>, <&clkc CLKID_CLK81>;
};
&pwm_cd {
clocks = <&xtal>,
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
};
&pwm_ef {
clocks = <&xtal>,
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
};
&pwrc {
resets = <&reset RESET_VIU>,
<&reset RESET_VENC>,

View File

@@ -280,8 +280,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
/* This is connected to the Bluetooth module: */

View File

@@ -116,8 +116,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
&saradc {

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@@ -115,8 +115,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
/* SD card */

View File

@@ -211,8 +211,6 @@
status = "okay";
pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
pinctrl-names = "default";
clocks = <&xtal> , <&xtal>;
clock-names = "clkin0", "clkin1" ;
};
&pwm_ef {

View File

@@ -145,8 +145,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
/* Wireless SDIO Module */

View File

@@ -101,8 +101,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
&saradc {

View File

@@ -809,6 +809,31 @@
};
};
&pwm_ab {
clocks = <&xtal>,
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
};
&pwm_AO_ab {
clocks = <&xtal>, <&clkc CLKID_CLK81>;
};
&pwm_cd {
clocks = <&xtal>,
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
};
&pwm_ef {
clocks = <&xtal>,
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
};
&pwrc {
resets = <&reset RESET_VIU>,
<&reset RESET_VENC>,

View File

@@ -289,16 +289,12 @@
status = "okay";
pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
&sd_emmc_a {

View File

@@ -192,8 +192,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
/* Wireless SDIO Module */

View File

@@ -458,24 +458,18 @@
status = "okay";
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
};
&pwm_ab {
status = "okay";
pinctrl-0 = <&pwm_b_x7_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
};
&pwm_cd {
status = "okay";
pinctrl-0 = <&pwm_d_x3_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
};
&saradc {

View File

@@ -199,15 +199,11 @@
status = "okay";
pinctrl-0 = <&pwm_ao_a_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
@@ -215,8 +211,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
};
&saradc {

View File

@@ -367,8 +367,6 @@
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};

View File

@@ -78,8 +78,6 @@
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};

View File

@@ -392,8 +392,6 @@
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};

View File

@@ -435,15 +435,11 @@
status = "okay";
pinctrl-0 = <&pwm_ao_a_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
@@ -451,8 +447,6 @@
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
};
&saradc {