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Merge tag 'clk-microchip-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-microchip

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Microchip clock updates for v6.17

 - Fix the PLL output ranges for Microchip SAM9X7, based on the
   latest hardware documentation updates

* tag 'clk-microchip-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  clk: at91: sam9x7: update pll clk ranges
This commit is contained in:
Stephen Boyd
2025-07-21 17:34:01 -07:00
parent 19272b37aa c7f7ddbd27
commit 53afec24ec
1 changed files with 10 additions and 10 deletions
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20
drivers/clk/at91/sam9x7.c
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@@ -61,44 +61,44 @@ static const struct clk_master_layout sam9x7_master_layout = {
/* Fractional PLL core output range. */
static const struct clk_range plla_core_outputs[] = {
{ .min = 375000000, .max = 1600000000 },
{ .min = 800000000, .max = 1600000000 },
};
static const struct clk_range upll_core_outputs[] = {
{ .min = 600000000, .max = 1200000000 },
{ .min = 600000000, .max = 960000000 },
};
static const struct clk_range lvdspll_core_outputs[] = {
{ .min = 400000000, .max = 800000000 },
{ .min = 600000000, .max = 1200000000 },
};
static const struct clk_range audiopll_core_outputs[] = {
{ .min = 400000000, .max = 800000000 },
{ .min = 600000000, .max = 1200000000 },
};
static const struct clk_range plladiv2_core_outputs[] = {
{ .min = 375000000, .max = 1600000000 },
{ .min = 800000000, .max = 1600000000 },
};
/* Fractional PLL output range. */
static const struct clk_range plla_outputs[] = {
{ .min = 732421, .max = 800000000 },
{ .min = 400000000, .max = 800000000 },
};
static const struct clk_range upll_outputs[] = {
{ .min = 300000000, .max = 600000000 },
{ .min = 300000000, .max = 480000000 },
};
static const struct clk_range lvdspll_outputs[] = {
{ .min = 10000000, .max = 800000000 },
{ .min = 175000000, .max = 550000000 },
};
static const struct clk_range audiopll_outputs[] = {
{ .min = 10000000, .max = 800000000 },
{ .min = 0, .max = 300000000 },
};
static const struct clk_range plladiv2_outputs[] = {
{ .min = 366210, .max = 400000000 },
{ .min = 200000000, .max = 400000000 },
};
/* PLL characteristics. */