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Merge tag 'drm-intel-next-fixes-2025-05-15' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next

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- Stop writing ALPM registers when PSR is enabled
- Use the correct connector while computing the link BPP limit on MST

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://lore.kernel.org/r/aCWlWk5rTE7TH1pN@jlahtine-mobl
This commit is contained in:
Dave Airlie
2025-05-16 10:44:43 +10:00
parent e31b74b107 eff82fb0d2
commit 7cf346fcf9
6 changed files with 24 additions and 12 deletions
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8
drivers/gpu/drm/i915/display/intel_alpm.c
View File

@@ -426,8 +426,8 @@ void intel_alpm_pre_plane_update(struct intel_atomic_state *state,
}
}
static void intel_alpm_enable_sink(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
void intel_alpm_enable_sink(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
{
u8 val;
@@ -453,8 +453,8 @@ void intel_alpm_post_plane_update(struct intel_atomic_state *state,
intel_atomic_get_old_crtc_state(state, crtc);
struct intel_encoder *encoder;
if ((!crtc_state->has_lobf ||
crtc_state->has_lobf == old_crtc_state->has_lobf) && !crtc_state->has_psr)
if (crtc_state->has_psr || !crtc_state->has_lobf ||
crtc_state->has_lobf == old_crtc_state->has_lobf)
return;
for_each_intel_encoder_mask(display->drm, encoder,

2
drivers/gpu/drm/i915/display/intel_alpm.h
View File

@@ -23,6 +23,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
struct drm_connector_state *conn_state);
void intel_alpm_configure(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
void intel_alpm_enable_sink(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
void intel_alpm_pre_plane_update(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_alpm_post_plane_update(struct intel_atomic_state *state,

7
drivers/gpu/drm/i915/display/intel_dp.c
View File

@@ -2524,6 +2524,7 @@ intel_dp_dsc_compute_pipe_bpp_limits(struct intel_dp *intel_dp,
bool
intel_dp_compute_config_limits(struct intel_dp *intel_dp,
struct intel_connector *connector,
struct intel_crtc_state *crtc_state,
bool respect_downstream_limits,
bool dsc,
@@ -2577,7 +2578,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
intel_dp_test_compute_config(intel_dp, crtc_state, limits);
return intel_dp_compute_config_link_bpp_limits(intel_dp,
intel_dp->attached_connector,
connector,
crtc_state,
dsc,
limits);
@@ -2638,7 +2639,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes);
dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
!intel_dp_compute_config_limits(intel_dp, pipe_config,
!intel_dp_compute_config_limits(intel_dp, connector, pipe_config,
respect_downstream_limits,
false,
&limits);
@@ -2672,7 +2673,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
str_yes_no(ret), str_yes_no(joiner_needs_dsc),
str_yes_no(intel_dp->force_dsc_en));
if (!intel_dp_compute_config_limits(intel_dp, pipe_config,
if (!intel_dp_compute_config_limits(intel_dp, connector, pipe_config,
respect_downstream_limits,
true,
&limits))

1
drivers/gpu/drm/i915/display/intel_dp.h
View File

@@ -194,6 +194,7 @@ void intel_dp_wait_source_oui(struct intel_dp *intel_dp);
int intel_dp_output_bpp(enum intel_output_format output_format, int bpp);
bool intel_dp_compute_config_limits(struct intel_dp *intel_dp,
struct intel_connector *connector,
struct intel_crtc_state *crtc_state,
bool respect_downstream_limits,
bool dsc,

5
drivers/gpu/drm/i915/display/intel_dp_mst.c
View File

@@ -599,12 +599,13 @@ adjust_limits_for_dsc_hblank_expansion_quirk(struct intel_dp *intel_dp,
static bool
mst_stream_compute_config_limits(struct intel_dp *intel_dp,
const struct intel_connector *connector,
struct intel_connector *connector,
struct intel_crtc_state *crtc_state,
bool dsc,
struct link_config_limits *limits)
{
if (!intel_dp_compute_config_limits(intel_dp, crtc_state, false, dsc,
if (!intel_dp_compute_config_limits(intel_dp, connector,
crtc_state, false, dsc,
limits))
return false;

13
drivers/gpu/drm/i915/display/intel_psr.c
View File

@@ -800,6 +800,8 @@ static void _psr_enable_sink(struct intel_dp *intel_dp,
static void intel_psr_enable_sink(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
{
intel_alpm_enable_sink(intel_dp, crtc_state);
crtc_state->has_panel_replay ?
_panel_replay_enable_sink(intel_dp, crtc_state) :
_psr_enable_sink(intel_dp, crtc_state);
@@ -1962,6 +1964,8 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
IS_DISPLAY_VERx100_STEP(display, 3000, STEP_A0, STEP_B0)) &&
!intel_dp->psr.panel_replay_enabled)
intel_dmc_block_pkgc(display, intel_dp->psr.pipe, true);
intel_alpm_configure(intel_dp, crtc_state);
}
static bool psr_interrupt_error_check(struct intel_dp *intel_dp)
@@ -2029,8 +2033,9 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
intel_dp->psr.sel_update_enabled ? "2" : "1");
/*
* Enabling here only for PSR. Panel Replay enable bit is already
* written at this point. See
* Enabling sink PSR/Panel Replay here only for PSR. Panel Replay enable
* bit is already written at this point. Sink ALPM is enabled here for
* PSR and Panel Replay. See
* intel_psr_panel_replay_enable_sink. Modifiers/options:
* - Selective Update
* - Region Early Transport
@@ -2172,6 +2177,9 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
if (intel_dp_is_edp(intel_dp))
intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)->base, false);
if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp))
intel_alpm_disable(intel_dp);
/* Disable PSR on Sink */
if (!intel_dp->psr.panel_replay_enabled) {
drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
@@ -3498,7 +3506,6 @@ static void psr_alpm_check(struct intel_dp *intel_dp)
if (intel_alpm_get_error(intel_dp)) {
intel_psr_disable_locked(intel_dp);
psr->sink_not_reliable = true;
intel_alpm_disable(intel_dp);
}
}