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drm/amdgpu: Add mqd support for the fence address

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- Add a field in struct v11_gfx_mqd for userqueue
  fence address.

- Assign fence gpu VA address to the userqueue mqd
  fence address fields.

v2: Remove the mask and replace with lower_32_bits (Christian)

Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Arunpravin Paneer Selvam
2024-10-25 15:44:02 +05:30
committed by Alex Deucher
parent 97ff194625
commit 8493312a94
2 changed files with 13 additions and 2 deletions
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11
drivers/gpu/drm/amd/amdgpu/mes_v11_0_userqueue.c
View File

@@ -26,6 +26,7 @@
#include "v11_structs.h"
#include "mes_v11_0.h"
#include "mes_v11_0_userqueue.h"
#include "amdgpu_userq_fence.h"
#define AMDGPU_USERQ_PROC_CTX_SZ PAGE_SIZE
#define AMDGPU_USERQ_GANG_CTX_SZ PAGE_SIZE
@@ -229,6 +230,14 @@ static int mes_v11_0_userq_create_ctx_space(struct amdgpu_userq_mgr *uq_mgr,
return 0;
}
static void mes_v11_0_userq_set_fence_space(struct amdgpu_usermode_queue *queue)
{
struct v11_gfx_mqd *mqd = queue->mqd.cpu_ptr;
mqd->fenceaddress_lo = lower_32_bits(queue->fence_drv->gpu_addr);
mqd->fenceaddress_hi = upper_32_bits(queue->fence_drv->gpu_addr);
}
static int mes_v11_0_userq_mqd_create(struct amdgpu_userq_mgr *uq_mgr,
struct drm_amdgpu_userq_in *args_in,
struct amdgpu_usermode_queue *queue)
@@ -306,6 +315,8 @@ static int mes_v11_0_userq_mqd_create(struct amdgpu_userq_mgr *uq_mgr,
goto free_mqd;
}
mes_v11_0_userq_set_fence_space(queue);
/* FW expects WPTR BOs to be mapped into GART */
r = mes_v11_0_create_wptr_mapping(uq_mgr, queue, userq_props->wptr_gpu_addr);
if (r) {

4
drivers/gpu/drm/amd/include/v11_structs.h
View File

@@ -535,8 +535,8 @@ struct v11_gfx_mqd {
uint32_t reserved_507; // offset: 507 (0x1FB)
uint32_t reserved_508; // offset: 508 (0x1FC)
uint32_t reserved_509; // offset: 509 (0x1FD)
uint32_t reserved_510; // offset: 510 (0x1FE)
uint32_t reserved_511; // offset: 511 (0x1FF)
uint32_t fenceaddress_lo; // offset: 510 (0x1FE)
uint32_t fenceaddress_hi; // offset: 511 (0x1FF)
};
struct v11_sdma_mqd {