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mtd: rawnand: Correct multiple typos in comments

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Fixed some confusing spelling errors, the details are as follows:

-in the code comments:
	remaing		-> remaining
	alingment	-> alignment
	capabilitiies	-> capabilities
	operatoin	-> operation
	decriptors	-> descriptors
	stareted	-> started
	Unfortunelly	-> Unfortunately
	compatabable	-> compatible
	depenent	-> dependent

Signed-off-by: Shen Lichuan <shenlichuan@vivo.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240923065649.11966-1-shenlichuan@vivo.com
This commit is contained in:
Shen Lichuan
2024-09-23 14:56:49 +08:00
committed by Miquel Raynal
parent 9852d85ec9
commit 8ab1b51fa4
7 changed files with 9 additions and 9 deletions
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2
drivers/mtd/nand/raw/brcmnand/brcmnand.c
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@@ -1561,7 +1561,7 @@ static int write_oob_to_regs(struct brcmnand_controller *ctrl, int i,
(oob[j + 2] << 8) |
(oob[j + 3] << 0));
/* handle the remaing bytes */
/* handle the remaining bytes */
while (j < tbytes)
plast[k++] = oob[j++];

2
drivers/mtd/nand/raw/cadence-nand-controller.c
View File

@@ -1891,7 +1891,7 @@ static int cadence_nand_read_buf(struct cdns_nand_ctrl *cdns_ctrl,
int len_in_words = (data_dma_width == 4) ? len >> 2 : len >> 3;
/* read alingment data */
/* read alignment data */
if (data_dma_width == 4)
ioread32_rep(cdns_ctrl->io.virt, buf, len_in_words);
#ifdef CONFIG_64BIT

2
drivers/mtd/nand/raw/cs553x_nand.c
View File

@@ -26,7 +26,7 @@
#define NR_CS553X_CONTROLLERS 4
#define MSR_DIVIL_GLD_CAP 0x51400000 /* DIVIL capabilitiies */
#define MSR_DIVIL_GLD_CAP 0x51400000 /* DIVIL capabilities */
#define CAP_CS5535 0x2df000ULL
#define CAP_CS5536 0x5df500ULL

2
drivers/mtd/nand/raw/nand_macronix.c
View File

@@ -113,7 +113,7 @@ static void macronix_nand_onfi_init(struct nand_chip *chip)
rand_otp = of_property_read_bool(dn, "mxic,enable-randomizer-otp");
mxic = (struct nand_onfi_vendor_macronix *)p->onfi->vendor;
/* Subpage write is prohibited in randomizer operatoin */
/* Subpage write is prohibited in randomizer operation */
if (rand_otp && chip->options & NAND_NO_SUBPAGE_WRITE &&
mxic->reliability_func & MACRONIX_RANDOMIZER_BIT) {
if (p->supports_set_get_features) {

2
drivers/mtd/nand/raw/pl35x-nand-controller.c
View File

@@ -187,7 +187,7 @@ static const struct mtd_ooblayout_ops pl35x_ecc_ooblayout16_ops = {
.free = pl35x_ecc_ooblayout16_free,
};
/* Generic flash bbt decriptors */
/* Generic flash bbt descriptors */
static u8 bbt_pattern[] = { 'B', 'b', 't', '0' };
static u8 mirror_pattern[] = { '1', 't', 'b', 'B' };

4
drivers/mtd/nand/raw/r852.c
View File

@@ -335,7 +335,7 @@ static void r852_cmdctl(struct nand_chip *chip, int dat, unsigned int ctrl)
else
dev->ctlreg &= ~R852_CTL_WRITE;
/* when write is stareted, enable write access */
/* when write is started, enable write access */
if (dat == NAND_CMD_ERASE1)
dev->ctlreg |= R852_CTL_WRITE;
@@ -372,7 +372,7 @@ static int r852_wait(struct nand_chip *chip)
nand_status_op(chip, &status);
/* Unfortunelly, no way to send detailed error status... */
/* Unfortunately, no way to send detailed error status... */
if (dev->dma_error) {
status |= NAND_STATUS_FAIL;
dev->dma_error = 0;

4
drivers/mtd/nand/raw/sm_common.c
View File

@@ -52,8 +52,8 @@ static const struct mtd_ooblayout_ops oob_sm_ops = {
.free = oob_sm_ooblayout_free,
};
/* NOTE: This layout is not compatabable with SmartMedia, */
/* because the 256 byte devices have page depenent oob layout */
/* NOTE: This layout is not compatible with SmartMedia, */
/* because the 256 byte devices have page dependent oob layout */
/* However it does preserve the bad block markers */
/* If you use smftl, it will bypass this and work correctly */
/* If you not, then you break SmartMedia compliance anyway */