clk: renesas: rzg2l: Move pointers after hw member
Reorder the pointer members in struct mstp_clock so they appear immediately after the hw member. This helps avoid potential padding and eliminates the need for any calculations in the to_mod_clock() macro. As struct clk_hw currently contains only pointers, placing it first also avoids padding. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20250514090415.4098534-3-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
committed by
Geert Uytterhoeven
parent
2f96afdffa
commit
a68ea80f85
@@ -1185,19 +1185,19 @@ fail:
|
||||
* struct mstp_clock - MSTP gating clock
|
||||
*
|
||||
* @hw: handle between common and hardware-specific interfaces
|
||||
* @priv: CPG/MSTP private data
|
||||
* @sibling: pointer to the other coupled clock
|
||||
* @off: register offset
|
||||
* @bit: ON/MON bit
|
||||
* @enabled: soft state of the clock, if it is coupled with another clock
|
||||
* @priv: CPG/MSTP private data
|
||||
* @sibling: pointer to the other coupled clock
|
||||
*/
|
||||
struct mstp_clock {
|
||||
struct clk_hw hw;
|
||||
struct rzg2l_cpg_priv *priv;
|
||||
struct mstp_clock *sibling;
|
||||
u16 off;
|
||||
u8 bit;
|
||||
bool enabled;
|
||||
struct rzg2l_cpg_priv *priv;
|
||||
struct mstp_clock *sibling;
|
||||
};
|
||||
|
||||
#define to_mod_clock(_hw) container_of(_hw, struct mstp_clock, hw)
|
||||
|
||||
Reference in New Issue
Block a user