sugar/linux
1
0
Fork 0
Code Activity

spi: rockchip-sfc: Support sclk_x2 version

Browse Source 
SFC after version 8 supports dtr mode, so the IO is the binary output of
the controller clock.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://patch.msgid.link/20241219142216.2123065-1-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jon Lin
2024-12-19 22:22:16 +08:00
committed by Mark Brown
parent 1e293574c6
commit af103eb7d7
1 changed files with 19 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

21
drivers/spi/spi-rockchip-sfc.c
View File

@@ -112,6 +112,7 @@
#define SFC_VER_3 0x3
#define SFC_VER_4 0x4
#define SFC_VER_5 0x5
#define SFC_VER_8 0x8
/* Delay line controller register */
#define SFC_DLL_CTRL0 0x3C
@@ -216,6 +217,22 @@ static u32 rockchip_sfc_get_max_iosize(struct rockchip_sfc *sfc)
return SFC_MAX_IOSIZE_VER3;
}
static int rockchip_sfc_clk_set_rate(struct rockchip_sfc *sfc, unsigned long speed)
{
if (sfc->version >= SFC_VER_8)
return clk_set_rate(sfc->clk, speed * 2);
else
return clk_set_rate(sfc->clk, speed);
}
static unsigned long rockchip_sfc_clk_get_rate(struct rockchip_sfc *sfc)
{
if (sfc->version >= SFC_VER_8)
return clk_get_rate(sfc->clk) / 2;
else
return clk_get_rate(sfc->clk);
}
static void rockchip_sfc_irq_unmask(struct rockchip_sfc *sfc, u32 mask)
{
u32 reg;
@@ -518,12 +535,12 @@ static int rockchip_sfc_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op
if (unlikely(mem->spi->max_speed_hz != sfc->speed[cs]) &&
!has_acpi_companion(sfc->dev)) {
ret = clk_set_rate(sfc->clk, mem->spi->max_speed_hz);
ret = rockchip_sfc_clk_set_rate(sfc, mem->spi->max_speed_hz);
if (ret)
goto out;
sfc->speed[cs] = mem->spi->max_speed_hz;
dev_dbg(sfc->dev, "set_freq=%dHz real_freq=%ldHz\n",
sfc->speed[cs], clk_get_rate(sfc->clk));
sfc->speed[cs], rockchip_sfc_clk_get_rate(sfc));
}
rockchip_sfc_adjust_op_work((struct spi_mem_op *)op);