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Merge tag 'tegra-for-4.17-arm-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

Browse Source 
Pull "ARM: tegra: Device tree changes for v4.17-rc1" from Thierry Reding:

Support for the VDE is added on Tegra30 along with some general cleanup
and some improvements to the various Toradex boards.

* tag 'tegra-for-4.17-arm-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: apalis-tk1: Support v1.2 hardware revision
  ARM: tegra: apalis-tk1: Copyright period, spurious newlines
  ARM: tegra: apalis-tk1: Hog group for ethernet, PCIe, reset GPIOs
  ARM: tegra: apalis-tk1: Add missing as3722 gpio0 configuration
  ARM: tegra: apalis-tk1: Activate PWM pin muxing for pwm3
  ARM: tegra: apalis-tk1: Set critical trips
  ARM: tegra: apalis/colibri: Remove unneeded reg property
  ARM: tegra: apalis/colibri: Use correct compatible for RTC
  ARM: tegra: Fix I2C bus frequencies on Apalis/Colibri
  ARM: tegra: venice2: Remove duplicate pcie-1 node
  ARM: tegra: beaver: Remove invalid uses of rsvd1
  ARM: tegra: Use proper IRQ type definitions
  ARM: tegra: Fix ULPI regression on Tegra20
  ARM: tegra: Add unit address to VDE IRAM area
  ARM: tegra: Add video decoder node on Tegra30
  ARM: tegra: Add IRAM node on Tegra30
This commit is contained in:
Arnd Bergmann
2018-03-27 13:19:34 +02:00
parent 2d78b1dafc 4957a2f1f2
commit b2fc2640e8
16 changed files with 2425 additions and 93 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
View File

@@ -1037,6 +1037,7 @@ dtb-$(CONFIG_ARCH_TEGRA_114_SOC) += \
tegra114-tn7.dtb
dtb-$(CONFIG_ARCH_TEGRA_124_SOC) += \
tegra124-apalis-eval.dtb \
tegra124-apalis-v1.2-eval.dtb \
tegra124-jetson-tk1.dtb \
tegra124-nyan-big.dtb \
tegra124-nyan-blaze.dtb \

2
arch/arm/boot/dts/tegra114-dalmore.dts
View File

@@ -780,7 +780,7 @@
compatible = "realtek,rt5640";
reg = <0x1c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>;
interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
realtek,ldo1-en-gpios =
<&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
};

23
arch/arm/boot/dts/tegra124-apalis-eval.dts
View File

@@ -1,5 +1,5 @@
/*
* Copyright 2016 Toradex AG
* Copyright 2016-2018 Toradex AG
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@@ -105,7 +105,7 @@
*/
i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
clock-frequency = <400000>;
pcie-switch@58 {
compatible = "plx,pex8605";
@@ -114,7 +114,7 @@
/* M41T0M6 real time clock on carrier board */
rtc@68 {
compatible = "st,m41t00";
compatible = "st,m41t0";
reg = <0x68>;
};
};
@@ -124,7 +124,6 @@
*/
hdmi_ddc: i2c@7000c400 {
status = "okay";
clock-frequency = <100000>;
};
/*
@@ -133,7 +132,7 @@
*/
i2c@7000c500 {
status = "okay";
clock-frequency = <100000>;
clock-frequency = <400000>;
};
/* I2C4 (DDC): unused */
@@ -226,9 +225,7 @@
backlight: backlight {
compatible = "pwm-backlight";
/* BKL1_PWM */
pwms = <&pwm 3 5000000>;
pwms = <&pwm 3 5000000>; /* BKL1_PWM */
brightness-levels = <255 231 223 207 191 159 127 0>;
default-brightness-level = <6>;
/* BKL1_ON */
@@ -276,3 +273,13 @@
vin-supply = <&reg_5v0>;
};
};
&gpio {
/* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
pex_perst_n {
gpio-hog;
gpios = <TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PEX_PERST_N";
};
};

250
arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts Normal file
View File

@@ -0,0 +1,250 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2016-2018 Toradex AG
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "tegra124-apalis-v1.2.dtsi"
/ {
model = "Toradex Apalis TK1 on Apalis Evaluation Board";
compatible = "toradex,apalis-tk1-v1.2-eval", "toradex,apalis-tk1-eval",
"toradex,apalis-tk1", "nvidia,tegra124";
aliases {
rtc0 = "/i2c@7000c000/rtc@68";
rtc1 = "/i2c@7000d000/pmic@40";
rtc2 = "/rtc@7000e000";
serial0 = &uarta;
serial1 = &uartb;
serial2 = &uartc;
serial3 = &uartd;
};
chosen {
stdout-path = "serial0:115200n8";
};
pcie@1003000 {
pci@1,0 {
status = "okay";
};
};
host1x@50000000 {
hdmi@54280000 {
status = "okay";
};
};
/* Apalis UART1 */
serial@70006000 {
status = "okay";
};
/* Apalis UART2 */
serial@70006040 {
status = "okay";
};
/* Apalis UART3 */
serial@70006200 {
status = "okay";
};
/* Apalis UART4 */
serial@70006300 {
status = "okay";
};
pwm@7000a000 {
status = "okay";
};
/*
* GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
* board)
*/
i2c@7000c000 {
status = "okay";
clock-frequency = <400000>;
pcie-switch@58 {
compatible = "plx,pex8605";
reg = <0x58>;
};
/* M41T0M6 real time clock on carrier board */
rtc@68 {
compatible = "st,m41t0";
reg = <0x68>;
};
};
/* GEN2_I2C: unused */
/*
* CAM_I2C: I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor
* on carrier board)
*/
i2c@7000c500 {
status = "okay";
clock-frequency = <400000>;
};
/*
* I2C4 (DDC): I2C4_SDA/SCL (DDC) on MXM3 pin 205/207
* (e.g. display EDID)
*/
hdmi_ddc: i2c@7000c700 {
status = "okay";
};
/* SPI1: Apalis SPI1 */
spi@7000d400 {
status = "okay";
spi-max-frequency = <50000000>;
spidev0: spidev@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <50000000>;
};
};
/* SPI4: Apalis SPI2 */
spi@7000da00 {
status = "okay";
spi-max-frequency = <50000000>;
spidev1: spidev@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <50000000>;
};
};
/* Apalis Serial ATA */
sata@70020000 {
status = "okay";
};
hda@70030000 {
status = "okay";
};
usb@70090000 {
status = "okay";
};
/* Apalis MMC1 */
sdhci@700b0000 {
status = "okay";
/* MMC1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
bus-width = <4>;
vqmmc-supply = <&vddio_sdmmc1>;
};
/* Apalis SD1 */
sdhci@700b0400 {
status = "okay";
/* SD1_CD# */
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
bus-width = <4>;
vqmmc-supply = <&vddio_sdmmc3>;
};
/* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
usb@7d000000 {
status = "okay";
dr_mode = "otg";
};
usb-phy@7d000000 {
status = "okay";
vbus-supply = <&reg_usbo1_vbus>;
};
/* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
usb@7d004000 {
status = "okay";
};
usb-phy@7d004000 {
status = "okay";
vbus-supply = <&reg_usbh_vbus>;
};
/* EHCI instance 2: USB3_DP/N -> USBH4_DP/N */
usb@7d008000 {
status = "okay";
};
usb-phy@7d008000 {
status = "okay";
vbus-supply = <&reg_usbh_vbus>;
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm 3 5000000>; /* BKL1_PWM */
brightness-levels = <255 231 223 207 191 159 127 0>;
default-brightness-level = <6>;
/* BKL1_ON */
enable-gpios = <&gpio TEGRA_GPIO(BB, 5) GPIO_ACTIVE_HIGH>;
};
gpio-keys {
compatible = "gpio-keys";
wakeup {
label = "WAKE1_MICO";
gpios = <&gpio TEGRA_GPIO(DD, 3) GPIO_ACTIVE_LOW>;
linux,code = <KEY_WAKEUP>;
debounce-interval = <10>;
wakeup-source;
};
};
reg_5v0: regulator-5v0 {
compatible = "regulator-fixed";
regulator-name = "5V_SW";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
/* USBO1_EN */
reg_usbo1_vbus: regulator-usbo1-vbus {
compatible = "regulator-fixed";
regulator-name = "VCC_USBO1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_5v0>;
};
/* USBH_EN */
reg_usbh_vbus: regulator-usbh-vbus {
compatible = "regulator-fixed";
regulator-name = "VCC_USBH(2A|2C|2D|3|4)";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(T, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&reg_5v0>;
};
};
&gpio {
/* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
pex_perst_n {
gpio-hog;
gpios = <TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PEX_PERST_N";
};
};

2052
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi Normal file
View File

File diff suppressed because it is too large Load Diff

72
arch/arm/boot/dts/tegra124-apalis.dtsi
View File

@@ -1,5 +1,5 @@
/*
* Copyright 2016 Toradex AG
* Copyright 2016-2018 Toradex AG
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@@ -56,7 +56,6 @@
pcie@1003000 {
status = "okay";
avddio-pex-supply = <&vdd_1v05>;
avdd-pex-pll-supply = <&vdd_1v05>;
avdd-pll-erefe-supply = <&avdd_1v05>;
@@ -85,7 +84,6 @@
hdmi@54280000 {
pll-supply = <&reg_1v05_avdd_hdmi_pll>;
vdd-supply = <&reg_3v3_avdd_hdmi>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
nvidia,hpd-gpio =
<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
@@ -453,12 +451,12 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
/* PWM3 active on pu6 being Apalis BKL1_PWM */
/* PWM3 active on pu6 being Apalis BKL1_PWM as well */
ph3 {
nvidia,pins = "ph3";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,function = "pwm3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
@@ -1579,7 +1577,7 @@
};
hdmi_ddc: i2c@7000c400 {
clock-frequency = <100000>;
clock-frequency = <10000>;
};
/* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor */
@@ -1600,15 +1598,11 @@
compatible = "ams,as3722";
reg = <0x40>;
interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
ams,system-power-controller;
#interrupt-cells = <2>;
interrupt-controller;
gpio-controller;
#gpio-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&as3722_default>;
@@ -1620,9 +1614,9 @@
bias-pull-up;
};
gpio1_3_4_5_6 {
pins = "gpio1", "gpio3", "gpio4",
"gpio5", "gpio6";
gpio0_1_3_4_5_6 {
pins = "gpio0", "gpio1", "gpio3",
"gpio4", "gpio5", "gpio6";
bias-high-impedance;
};
};
@@ -1783,7 +1777,6 @@
reg = <0x4c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
#thermal-sensor-cells = <1>;
};
};
@@ -1816,7 +1809,6 @@
sata@70020000 {
phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
phy-names = "sata-0";
avdd-supply = <&vdd_1v05>;
hvdd-supply = <&reg_3v3>;
vddio-supply = <&vdd_1v05>;
@@ -1830,7 +1822,6 @@
<&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>,
<&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>;
phy-names = "usb2-0", "usb3-1", "usb2-1", "usb2-2", "usb3-0";
avddio-pex-supply = <&vdd_1v05>;
avdd-pll-erefe-supply = <&avdd_1v05>;
avdd-pll-utmip-supply = <&vddio_1v8>;
@@ -2041,53 +2032,50 @@
thermal-zones {
cpu {
trips {
trip@0 {
cpu-shutdown-trip {
temperature = <101000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
/*
* There are currently no cooling maps because
* there are no cooling devices
*/
};
};
mem {
trips {
trip@0 {
mem-shutdown-trip {
temperature = <101000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
/*
* There are currently no cooling maps because
* there are no cooling devices
*/
};
};
gpu {
trips {
trip@0 {
gpu-shutdown-trip {
temperature = <101000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
/*
* There are currently no cooling maps because
* there are no cooling devices
*/
};
};
};
};
&gpio {
/* I210 Gigabit Ethernet Controller Reset */
lan_reset_n {
gpio-hog;
gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "LAN_RESET_N";
};
/* Control MXM3 pin 26 Reset Module Output Carrier Input */
reset_moci_ctrl {
gpio-hog;
gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "RESET_MOCI_CTRL";
};
};

2
arch/arm/boot/dts/tegra124-jetson-tk1.dts
View File

@@ -1418,7 +1418,7 @@
compatible = "realtek,rt5639";
reg = <0x1c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
realtek,ldo1-en-gpios =
<&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
};

9
arch/arm/boot/dts/tegra124-venice2.dts
View File

@@ -613,7 +613,7 @@
compatible = "maxim,max98090";
reg = <0x10>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
};
};
@@ -859,7 +859,7 @@
reg = <0x9>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(J, 0)
GPIO_ACTIVE_HIGH>;
IRQ_TYPE_EDGE_BOTH>;
ti,ac-detect-gpios = <&gpio
TEGRA_GPIO(J, 0)
GPIO_ACTIVE_HIGH>;
@@ -956,11 +956,6 @@
nvidia,function = "usb3-ss";
status = "okay";
};
pcie-1 {
nvidia,function = "usb3-ss";
status = "okay";
};
};
};
};

16
arch/arm/boot/dts/tegra20-colibri-512.dtsi
View File

@@ -213,21 +213,27 @@
GPIO_ACTIVE_HIGH>;
};
/*
* GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
* board)
*/
i2c@7000c000 {
clock-frequency = <400000>;
};
/* DDC_SCL/SDA on X3 pin 15/16 (e.g. display EDID) */
i2c_ddc: i2c@7000c400 {
clock-frequency = <100000>;
clock-frequency = <10000>;
};
i2c@7000c500 {
clock-frequency = <400000>;
};
/* GEN2_I2C: unused */
/* CAM/GEN3_I2C: used as EXT_IO1/2 GPIOs on SODIMM pin 133/127 */
/* PWR_I2C: power I2C to PMIC and temperature sensor (On-module) */
i2c@7000d000 {
status = "okay";
clock-frequency = <400000>;
clock-frequency = <100000>;
pmic: tps6586x@34 {
compatible = "ti,tps6586x";

4
arch/arm/boot/dts/tegra20.dtsi
View File

@@ -17,7 +17,7 @@
#size-cells = <1>;
ranges = <0 0x40000000 0x40000>;
vde_pool: vde {
vde_pool: vde@400 {
reg = <0x400 0x3fc00>;
pool;
};
@@ -741,7 +741,7 @@
phy_type = "ulpi";
clocks = <&tegra_car TEGRA20_CLK_USB2>,
<&tegra_car TEGRA20_CLK_PLL_U>,
<&tegra_car TEGRA20_CLK_CDEV2>;
<&tegra_car TEGRA20_CLK_PLL_P_OUT4>;
clock-names = "reg", "pll_u", "ulpi-link";
resets = <&tegra_car 58>, <&tegra_car 22>;
reset-names = "usb", "utmi-pads";

4
arch/arm/boot/dts/tegra30-apalis-eval.dts
View File

@@ -79,7 +79,7 @@
*/
i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
clock-frequency = <400000>;
pcie-switch@58 {
compatible = "plx,pex8605";
@@ -88,7 +88,7 @@
/* M41T0M6 real time clock on carrier board */
rtc@68 {
compatible = "st,m41t00";
compatible = "st,m41t0";
reg = <0x68>;
};
};

7
arch/arm/boot/dts/tegra30-apalis.dtsi
View File

@@ -437,7 +437,7 @@
};
hdmiddc: i2c@7000c700 {
clock-frequency = <100000>;
clock-frequency = <10000>;
};
/*
@@ -597,7 +597,6 @@
stmpe_touchscreen@0 {
compatible = "st,stmpe-ts";
reg = <0>;
/* 3.25 MHz ADC clock speed */
st,adc-freq = <1>;
/* 8 sample average control */
@@ -657,7 +656,7 @@
reg = <1>;
clocks = <&clk16m>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_LOW>;
interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_RISING>;
spi-max-frequency = <10000000>;
};
};
@@ -672,7 +671,7 @@
reg = <0>;
clocks = <&clk16m>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
interrupts = <TEGRA_GPIO(W, 2) IRQ_TYPE_EDGE_RISING>;
spi-max-frequency = <10000000>;
};
};

32
arch/arm/boot/dts/tegra30-beaver.dts
View File

@@ -260,14 +260,14 @@
};
sdmmc3_dat6_pd3 {
nvidia,pins = "sdmmc3_dat6_pd3";
nvidia,function = "rsvd1";
nvidia,function = "spdif";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
sdmmc3_dat7_pd4 {
nvidia,pins = "sdmmc3_dat7_pd4";
nvidia,function = "rsvd1";
nvidia,function = "spdif";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -281,14 +281,14 @@
};
vi_vsync_pd6 {
nvidia,pins = "vi_vsync_pd6";
nvidia,function = "rsvd1";
nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
vi_hsync_pd7 {
nvidia,pins = "vi_hsync_pd7";
nvidia,function = "rsvd1";
nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -806,7 +806,7 @@
};
hdmi_int_pn7 {
nvidia,pins = "hdmi_int_pn7";
nvidia,function = "rsvd1";
nvidia,function = "hdmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -841,7 +841,7 @@
};
ulpi_data3_po4 {
nvidia,pins = "ulpi_data3_po4";
nvidia,function = "rsvd1";
nvidia,function = "uarta";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1107,21 +1107,21 @@
};
vi_d10_pt2 {
nvidia,pins = "vi_d10_pt2";
nvidia,function = "rsvd1";
nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
vi_d11_pt3 {
nvidia,pins = "vi_d11_pt3";
nvidia,function = "rsvd1";
nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
vi_d0_pt4 {
nvidia,pins = "vi_d0_pt4";
nvidia,function = "rsvd1";
nvidia,function = "ddr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1151,7 +1151,7 @@
};
pu0 {
nvidia,pins = "pu0";
nvidia,function = "rsvd1";
nvidia,function = "owr";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1172,7 +1172,7 @@
};
pu3 {
nvidia,pins = "pu3";
nvidia,function = "rsvd1";
nvidia,function = "pwm0";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1193,7 +1193,7 @@
};
pu6 {
nvidia,pins = "pu6";
nvidia,function = "rsvd1";
nvidia,function = "pwm3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1221,7 +1221,7 @@
};
pv3 {
nvidia,pins = "pv3";
nvidia,function = "rsvd1";
nvidia,function = "clk_12m_out";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
@@ -1510,7 +1510,7 @@
};
pbb0 {
nvidia,pins = "pbb0";
nvidia,function = "rsvd1";
nvidia,function = "i2s4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1575,7 +1575,7 @@
};
pcc1 {
nvidia,pins = "pcc1";
nvidia,function = "rsvd1";
nvidia,function = "i2s4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
@@ -1762,7 +1762,7 @@
compatible = "realtek,rt5640";
reg = <0x1c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_EDGE_FALLING>;
realtek,ldo1-en-gpios =
<&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>;
};

6
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
View File

@@ -56,11 +56,11 @@
*/
i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
clock-frequency = <400000>;
/* M41T0M6 real time clock on carrier board */
rtc@68 {
compatible = "st,m41t00";
compatible = "st,m41t0";
reg = <0x68>;
};
};
@@ -79,7 +79,7 @@
reg = <0>;
clocks = <&clk16m>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_EDGE_RISING>;
spi-max-frequency = <10000000>;
};
spidev0: spi@1 {

3
arch/arm/boot/dts/tegra30-colibri.dtsi
View File

@@ -215,7 +215,7 @@
};
hdmiddc: i2c@7000c700 {
clock-frequency = <100000>;
clock-frequency = <10000>;
};
/*
@@ -363,7 +363,6 @@
stmpe_touchscreen {
compatible = "st,stmpe-ts";
reg = <0>;
/* 3.25 MHz ADC clock speed */
st,adc-freq = <1>;
/* 8 sample average control */

35
arch/arm/boot/dts/tegra30.dtsi
View File

@@ -91,6 +91,19 @@
};
};
iram@40000000 {
compatible = "mmio-sram";
reg = <0x40000000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x40000000 0x40000>;
vde_pool: vde@400 {
reg = <0x400 0x3fc00>;
pool;
};
};
host1x@50000000 {
compatible = "nvidia,tegra30-host1x", "simple-bus";
reg = <0x50000000 0x00024000>;
@@ -358,6 +371,28 @@
*/
};
vde@6001a000 {
compatible = "nvidia,tegra30-vde", "nvidia,tegra20-vde";
reg = <0x6001a000 0x1000 /* Syntax Engine */
0x6001b000 0x1000 /* Video Bitstream Engine */
0x6001c000 0x100 /* Macroblock Engine */
0x6001c200 0x100 /* Post-processing Engine */
0x6001c400 0x100 /* Motion Compensation Engine */
0x6001c600 0x100 /* Transform Engine */
0x6001c800 0x100 /* Pixel prediction block */
0x6001ca00 0x100 /* Video DMA */
0x6001d800 0x400>; /* Video frame controls */
reg-names = "sxe", "bsev", "mbe", "ppe", "mce",
"tfe", "ppb", "vdma", "frameid";
iram = <&vde_pool>; /* IRAM region */
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, /* Sync token interrupt */
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, /* BSE-V interrupt */
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; /* SXE interrupt */
interrupt-names = "sync-token", "bsev", "sxe";
clocks = <&tegra_car TEGRA30_CLK_VDE>;
resets = <&tegra_car 61>;
};
apbmisc@70000800 {
compatible = "nvidia,tegra30-apbmisc", "nvidia,tegra20-apbmisc";
reg = <0x70000800 0x64 /* Chip revision */