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MAINTAINERS: Add entry for Andes SoC

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Add entry for Andes SoC maintainer and related files

Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Link: https://lore.kernel.org/r/20250711133025.2192404-10-ben717@andestech.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Ben Zong-You Xie
2025-07-11 21:30:25 +08:00
committed by Arnd Bergmann
parent ad087c91eb
commit bf40c1a5b9
1 changed files with 9 additions and 0 deletions
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@@ -21285,6 +21285,15 @@ F: drivers/irqchip/irq-riscv-intc.c
F: include/linux/irqchip/riscv-aplic.h
F: include/linux/irqchip/riscv-imsic.h
RISC-V ANDES SoC Support
M: Ben Zong-You Xie <ben717@andestech.com>
S: Maintained
T: git: https://github.com/ben717-linux/linux
F: Documentation/devicetree/bindings/interrupt-controller/andestech,plicsw.yaml
F: Documentation/devicetree/bindings/riscv/andes.yaml
F: Documentation/devicetree/bindings/timer/andestech,plmt0.yaml
F: arch/riscv/boot/dts/andes/
RISC-V ARCHITECTURE
M: Paul Walmsley <paul.walmsley@sifive.com>
M: Palmer Dabbelt <palmer@dabbelt.com>