Add statics to board-omap4-panda.c's internal functions and data
structures to remove sparse warnings:
arch/arm/mach-omap2/board-omap4panda.c:234:29: warning: symbol
'omap_panda_wlan_data' was not declared. Should it be static?
arch/arm/mach-omap2/board-omap4panda.c:441:24: warning: symbol
'omap4_panda_dvi_device' was not declared. Should it be static?
arch/arm/mach-omap2/board-omap4panda.c:451:12: warning: symbol
'omap4_panda_dvi_init' was not declared. Should it be static?
arch/arm/mach-omap2/board-omap4panda.c:512:13: warning: symbol
'omap4_panda_display_init' was not declared. Should it be static?
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Looks like the register offsets are incorrect in the OMAP mailbox code
(arch/arm/mach-omap2/mailbox.c) for the OMAP4_MAILBOX_IRQ* macros. The
discrepancy is with p.224 of TI document SPRUGX9 and p3891 of SWPU231K.
Acked-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Henry Chan <enli.chan@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/plat-omap/devices.c: In function 'omap_dsp_reserve_sdram_memblock':
arch/arm/plat-omap/devices.c:170: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'phys_addr_t'
arch/arm/mach-omap2/dsp.c: In function 'omap_dsp_init':
arch/arm/mach-omap2/dsp.c:60: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'phys_addr_t'
arch/arm/mach-omap2/dsp.c:60: warning: format '%x' expects type 'unsigned int', but argument 4 has type 'phys_addr_t'
Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Current OMAP code supports couple of clocksource options based
on compilation flag (CONFIG_OMAP_32K_TIMER). The 32KHz sync-timer
and a gptimer which can run on 32KHz or system clock (e.g 38.4 MHz).
So there can be 3 options -
1. 32KHz sync-timer
2. Sys_clock based (e.g 13/19.2/26/38.4 MHz) gptimer
3. 32KHz based gptimer.
The optional gptimer based clocksource was added so that it can
give the high precision than sync-timer, so expected usage was 2
and not 3.
Unfortunately option 2, clocksource doesn't meet the requirement of
free-running clock as per clocksource need. It stops in low power states
when sys_clock is cut. That makes gptimer based clocksource option
useless for OMAP2/3/4 devices with sys_clock as a clock input.
So, in order to use option 2, deeper idle state MUST be disabled.
Option 3 will still work but it is no better than 32K sync-timer
based clocksource.
We must support both sync timer and gptimer based clocksource as
some OMAP based derivative SoCs like AM33XX does not have the
sync timer.
Considering above, make sync-timer and gptimer clocksource runtime
selectable so that both OMAP and AMXXXX continue to use the same code.
And, in order to precisely configure/setup sched_clock for given
clocksource, decision has to be made early enough in boot sequence.
So, the solution is,
Use standard kernel parameter ("clocksource=") to override
default 32k_sync-timer, in addition to this, we also use hwmod database
lookup mechanism, through which at run-time we can identify availability
of 32k-sync timer on the device, else fall back to gptimer.
Also, moved low-level SoC specific init code to respective files,
(mach-omap1/timer32k.c and mach-omap2/timer.c)
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Depending on the bootloader, passing command-line arguments
with spaces may have issues. Some bootloaders doesn't seem
to pass along the quotes, passing only 'gp' part of the string,
which leads to wrong override configuration.
The only affected kernel parameter configuration for OMAP family
is "clocksource=", used to override kernel clocksource.
So this patch changes "gp timer" => "gp_timer", for clockevent,
clocksource and timer irq_handler.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On OMAP1, omap_32k_timer_init() function always returns "true",
irrespective of whether error occurred while initializing 32k sync
counter as a kernel clocksource or not and execution will never
fallback to mpu_timer clocksource init code.
This patch adds check for return value from function
omap_init_clocksource_32k(), and fallback to omap_mpu_timer_init()
in case of failure/error from omap_init_clocksource_32k().
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix two board spefific regressions and one regression caused by bad documentation
By Archit Taneja (1) and others
via Tony Lindgren
* tag 'omap-fixes-for-v3.4-rc6-take-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: igep0020: fix smsc911x dummy regulator id
ARM: OMAP: Revert "ARM: OMAP: ctrl: Fix CONTROL_DSIPHY register fields"
ARM: OMAP1: Amstrad Delta: Fix wrong IRQ base in FIQ handler
id 0 is already used and causes errors at boot:
WARNING: at fs/sysfs/dir.c:508 sysfs_add_one+0x9c/0xac()
sysfs: cannot create duplicate filename '/devices/platform/reg-fixed-voltage.0'
Fix it by using the next available one (id=1).
This was caused by 5b3689f4 (ARM: OMAP2+: smsc911x: Add fixed
board regulators) that did not account for some regulators
already being used.
Signed-off-by: Enrico Butera <ebutera@users.berlios.de>
[tony@atomide.com: updated comments for regression causing commit]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This also introduces <asm/sta2x11.h> to export a function that is in
the base sta2x11 support patches. The header will increase with other
prototypes and constants over time.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Acked-by: Giancarlo Asnaghi <giancarlo.asnaghi@st.com>
Cc: Alan Cox <alan@linux.intel.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
When disabling ibs there might be the case where hardware continuously
generates interrupts. This is described in erratum #420 (Instruction-
Based Sampling Engine May Generate Interrupt that Cannot Be Cleared).
To avoid this we must clear the counter mask first and then clear the
enable bit. This patch implements this.
See Revision Guide for AMD Family 10h Processors, Publication #41322.
Note: We now keep track of the last read ibs config value which is
then used to disable ibs. To update the config value we pass now a
pointer to the functions reading it.
Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1333390758-10893-11-git-send-email-robert.richter@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
There are cases where the remaining period is smaller than the minimal
possible value. In this case the counter is restarted with the minimal
period. This is of no use as the interrupt handler will trigger
immediately again and most likely hits itself. This biases the
results.
So, if the remaining period is within the min range, we better do not
restart the counter and instead trigger the overflow.
Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1333390758-10893-9-git-send-email-robert.richter@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This patch adds support for precise event sampling with IBS. There are
two counting modes to count either cycles or micro-ops. If the
corresponding performance counter events (hw events) are setup with
the precise flag set, the request is redirected to the ibs pmu:
perf record -a -e cpu-cycles:p ... # use ibs op counting cycle count
perf record -a -e r076:p ... # same as -e cpu-cycles:p
perf record -a -e r0C1:p ... # use ibs op counting micro-ops
Each ibs sample contains a linear address that points to the
instruction that was causing the sample to trigger. With ibs we have
skid 0. Thus, ibs supports precise levels 1 and 2. Samples are marked
with the PERF_EFLAGS_EXACT flag set. In rare cases the rip is invalid
when IBS was not able to record the rip correctly. Then the
PERF_EFLAGS_EXACT flag is cleared and the rip is taken from pt_regs.
V2:
* don't drop samples in precise level 2 if rip is invalid, instead
support the PERF_EFLAGS_EXACT flag
Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/20120502103309.GP18810@erda.amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Fixing profiling at a fixed frequency, in this case the freq value and
sample period was setup incorrectly. Since sampling periods are
adjusted we also allow periods that have lower 4 bits set.
Another fix is the setup of the hw counter: If we modify
hwc->sample_period, we also need to update hwc->last_period and
hwc->period_left.
Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1333390758-10893-5-git-send-email-robert.richter@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
We always need to pass the last sample period to
perf_sample_data_init(), otherwise the event distribution will be
wrong. Thus, modifiyng the function interface with the required period
as argument. So basically a pattern like this:
perf_sample_data_init(&data, ~0ULL);
data.period = event->hw.last_period;
will now be like that:
perf_sample_data_init(&data, ~0ULL, event->hw.last_period);
Avoids unininitialized data.period and simplifies code.
Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1333390758-10893-3-git-send-email-robert.richter@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The ISR does quiete a lot of hw access which could be avoided. First it
checks for a pending interrupt by reading alteast one register. Then it
checks for the "activated" slots by reading another register. This is
more or a less a must.
Now, once it found an active slot it does the same two reads again.
After that it "knows" that there must be a pending transfer however it
cross checks with the other register. There are 32 bit in an interger
which are polled instead of considering only the set bits and ignoring
those which are zero. This performs atleast 32 reads which could be
avoided. In case of a first match it does another read.
This patch reorganizes the access by re-using the register which have
been read and then uses ffs() to find the matching slot instead looping
over it. By doing this we get rid of the last (32 + 2 + hits) reads.
It is possible however that by really busy bank0 we never get to handle
bank1. If this is a problem, we could try to handle bank1 after we are
done with bank0 to check if there are any outstanding transfers.
To put some numbers on this, this is from spi transfer via spidev. The
first column is the number of total transfers, the time stamp is taken
before and after the ioctl():
|10000, min: 542us avg: 591us
|20000, min: 542us avg: 592us
|30000, min: 542us avg: 592us
|40000, min: 542us avg: 585us
|50000, min: 542us avg: 593us
The same test case with the patch applied
|10000, min: 444us avg: 493us
|20000, min: 444us avg: 491us
|30000, min: 444us avg: 489us
|40000, min: 444us avg: 491us
|50000, min: 444us avg: 492us
that is almost 100us that just went away.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Apart from the necessity to do this change for multi-platform kernels
the previous logic depended on the zImage decompressor to write the
physical and virtual address to a magic memory location.
If the decompressor is unused or not correctly configured for the
current machid, the addruart macro was an infinite loop. Moreover
debugging the early zImage code was not possible either.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
[nsekhar@ti.com: add braces in _DEBUG_LL_ENTRY() macro to fix checkpatch
error. Fix debug port choice config dependency for traditional DaVincis.
Modify debug port config names and add help text.]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Allows emulating more interesting NUMA configurations like a quad
socket AMD Magny-Cour:
"numa=fake=8:10,16,16,22,16,22,16,22,
16,10,22,16,22,16,22,16,
16,22,10,16,16,22,16,22,
22,16,16,10,22,16,22,16,
16,22,16,22,10,16,16,22,
22,16,22,16,16,10,22,16,
16,22,16,22,16,22,10,16,
22,16,22,16,22,16,16,10"
Which has a non-fully-connected topology.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Tejun Heo <tj@kernel.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: x86@kernel.org
Link: http://lkml.kernel.org/n/tip-e1136ef7kdffj7yf9tjhydln@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
By Paul Parsons (5) and others
via Haojian Zhuang
* 'board-specific' of git://github.com/hzhuang1/linux:
pcmcia: add driver for hx4700
ARM: pxa: Add standard UART to hx4700_pin_config[]
ARM: mmp: add usb host support for aspen
ARM: mmp: add usb host support for PXA168
ARM: mmp: add usb device support for ttc dkb
ARM: mmp: add usb device support for PXA910
ARM: pxa: hx4700: Add PCMCIA/CF support
ARM: pxa: hx4700: Enable ASIC3 GPIO as a wakeup source
ARM: pxa: hx4700: Initialize DS1WM clock_rate
ARM: pxa: mioa701 add camera output enable gpio
ARM: pxa: use ioremap to access CPLD
Signed-off-by: Olof Johansson <olof@lixom.net>
CPUidle cleanup
By Daniel Lezcano
via Kevin Hilman (1) and Tony Lindgren (1)
* tag 'omap-cleanup-cpuidle-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP3: cpuidle - check the powerdomain lookup
ARM: OMAP3: cpuidle - set global variables static
ARM: OMAP3: set omap3_idle_data as static
ARM: OMAP3: cpuidle - simplify next_valid_state
ARM: OMAP3: cpuidle - use omap3_idle_data directly
ARM: OMAP3: define statically the omap3_idle_data
ARM: OMAP3: cpuidle - remove cpuidle_params_table
ARM: OMAP3: cpuidle - remove the 'valid' field
ARM: OMAP3: cpuidle - remove errata check in the init function
ARM: OMAP3: define cpuidle statically
ARM: OMAP3: cpuidle - remove rx51 cpuidle parameters table
ARM: OMAP4: cpuidle - remove omap4_idle_data initialization at boot time
ARM: OMAP4: cpuidle - use the omap4_idle_data variable directly
ARM: OMAP4: cpuidle - Initialize omap4_idle_data at compile time
ARM: OMAP4: cpuidle - fix static omap4_idle_data declaration
ARM: OMAP4: cpuidle - Remove the cpuidle_params_table table
ARM: OMAP4: cpuidle - Declare the states with the driver declaration
ARM: OMAP4: cpuidle - Remove unused valid field
Signed-off-by: Olof Johansson <olof@lixom.net>
Linux 3.4-rc6
Resolve conflict where an u5500 file had a bugfix go in, but was
deleted in the branch staged for next merge window.
Signed-off-by: Olof Johansson <olof@lixom.net>
Clean up of hwmod to shrink down the IP block interconnections
By Paul Walmsley
via Paul Walmsley (1) and Tony Lindgren (1)
* tag 'omap-cleanup-hwmod-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (29 commits)
ARM: OMAP2xxx: hwmod data: start to fix the IVA1, IVA2 and DSP
ARM: OMAP3: hwmod data: add IVA hard reset lines, main clock, clockdomain
ARM: OMAP3: hwmod data: fix IVA interface clock
ARM: OMAP2xxx: hwmod data: share common interface data
ARM: OMAP2xxx: hwmod data: share common hwmods between OMAP2420 and OMAP2430
ARM: OMAP2+: hwmod data: remove forward declarations, reorganize
ARM: OMAP: hwmod: remove code support for direct hwmod registration
ARM: OMAP2+: hwmod data: convert to link registration
ARM: OMAP2+: hwmod: add support for link registration
ARM: OMAP2+: hwmod: consolidate finding the MPU port index and storing it
ARM: OMAP2+: hwmod: add function to iterate over struct omap_hwmod_ocp_if
ARM: OMAP2+: hwmod: add _find_mpu_rt_port()
ARM: OMAP2+: hwmod: extend OCP_* register offsets from 16 to 32 bits
ARM: OMAP4: hwmod data: uncomment some "excluded" hwmods
ARM: OMAP4: hwmod data: add OCP_USER_DSP; mark omap44xx_dsp__iva appropriately
ARM: OMAP4: hwmod data: remove bandgap hwmod
ARM: OMAP3: hwmod data: GPTIMER12 is attached to a separate interconnect
ARM: OMAP3: hwmod data: add DSS->L3 interconnect for 3430ES1
ARM: OMAP3: hwmod data: fix interfaces for the MMC hwmods
ARM: OMAP2/3: hwmod data: update old names
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Sparse and cppcheck warning fixes
By Paul Walmsley
via Paul Walmsley (1) and Tony Lindgren (1)
* tag 'omap-cleanup-sparse-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: clean up some cppcheck warnings
ARM: OMAP1: board files: deduplicate and clean some NAND-related code
ARM: OMAP: USB: remove unnecessary sideways include
ARM: OMAP: DMA: use constant array maximum, drop some LCD DMA code
ARM: OMAP: OCM RAM: use memset_io() when clearing SRAM
ARM: OMAP: fix 'using plain integer as NULL pointer' sparse warnings
ARM: OMAP2+: GPMC: resolve type-conversion warning from sparse
ARM: OMAP1: OHCI: use platform_data fn ptr to enable OCPI bus
ARM: OMAP1: OCPI: move to mach-omap1/
ARM: OMAP: add includes for missing prototypes
ARM: OMAP2+: declare file-local functions as static
Signed-off-by: Olof Johansson <olof@lixom.net>
From: Linus Walleij <linus.walleij@linaro.org>:
Four core patches paving the way for device tree enablement
of the Snowball and ux500 at large by Lee Jones.
* 'ux500-devicetree-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Enable PRCMU Timer 4 (clocksource) for Device Tree
ARM: ux500: Disable SMSC911x platform code registration when DT is enabled
ARM: ux500: Fork cpu-db8500 platform_devs for sequential DT enablement
ARM: ux500: Do not attempt to register non-existent i2c devices on Snowball
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
"Jean-Christophe PLAGNIOL-VILLARD" <plagnioj@jcrosoft.com> writes:
ARM: AT91 more DT material
New SoC conversion and boards support
SoC convertion to DT:
- at91sam9260
- at91sam9263
boards:
- Atmel at91sam9g20ek/9263ek
- Calao TNY-A9260/A9263/A9G20
- Calao USB-A9260/A9263
- Ethernnut 5
- Kizbox
* tag 'at91-for-next-dt' of git://github.com/at91linux/linux-at91: (32 commits)
Ethernut 5 board support
ARM: at91: add kizbox board dt support.
ARM: at91: DT: add Calao TNY A9263 board support
ARM: at91: DT: add Calao USB A9263 board support
ARM: at91: add at91sam9263ek DT support
ARM: at91: add at91sam9263 DT support
ARM: at91: standard device init only if DT is not populated.
ARM: at91: DT: add Calao USB A9260 DT support
ARM: at91: Calao USB A926x factorize common binding in usb_a9260_common
ARM: at91: USB A926x update nand partition
ARM: at91: add at91sam9g20ek boards dt support
arm: at91: add Calao TNY-A9260 and TNY-A9G20 board support
ARM: at91: add at91sam9260 DT support
ARM: at91: add defconfig for device tree
ARM: at91/dt: do not specify the board any more
ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core support
ARM: at91: add SOC_AT91SAM9 kconfig option to factorise select
ARM: at91: pm select memory controler at runtime
ARM: at91: move at91_init_leds to board init
ARM: at91: do not pin mux the UARTs in init_early
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
Linus Walleij <linus.walleij@linaro.org> writes:
this pull request contains some device tree work by Lee Jones.
I have tried to keep these patches in the arch/arm/boot/dts/*
space to get some sanity in the branch proliferation.
There is still one patch that touches arch/arm/mach-ux500 too
though (but it should merge fine with the other ux500 stuff).
The changes to the device tree are of course dependent on some
core changes and some patching in the GPIO/pin driver, but as
the device tree files are believed to be a different world
(and should one day live in their own git) I split this off
anyway. I don't think people bisect the device trees per se
and the board code in conjunction anyway.
* 'ux500-devicetree-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Configure the PRCMU Timer for db8500 based devices in DT
ARM: ux500: Enable the SMSC9115 on Snowball via Device Tree
drivers/gpio: represent gpio-nomadik as an IRQ controller in DT documentation
ARM: ux500: Rename gpio_keys in the Device Tree file
drivers/gpio: gpio-nomadik: Provide documentation for Device Tree bindings
drivers/gpio: gpio-nomadik: Device Tree bindings
ARM: ux500: Enable the external bus with Device Tree
ARM: ux500: Shorten Snowball's DT compatible gpio entry
ARM: ux500: Rename the DT compatible entry for i2c devices on Snowball
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
* spear/dt:
ARM: SPEAr3xx: Correct keyboard data passed from DT
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
Roland Stigge <stigge@antcom.de> writes:
this is a rearrangement of all mach-lpc32xx specific patches for device
tree conversion. Please note that:
* It builds upon the i2c-pnx changes (see previous pull request, branch
lpc32xx/i2c)
* Dave Miller gave permission to merge the lpc_eth.c change via arm-soc
(patch 1/8)
The rest of the patches is mach-lpc32xx only.
* 'lpc32xx/dt' of git://git.antcom.de/linux-2.6:
ARM: LPC32xx: Defconfig update
ARM: LPC32xx: Move common code to common.c
ARM: LPC32xx: Device tree support
ARM: LPC32xx: DTS files for device tree conversion
ARM: LPC32xx: Remove obsolete platform Kconfig
ARM: LPC32xx: clock.c registration adjustment
ARM: LPC32xx: clock.c cleanup
net: Add device tree support to LPC32xx
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
As a prerequisite for merging the lpc32xx DT changes, this
pulls in the depends/i2c/lpc32xx branch that contains
changes to the pnx-i2c driver, which are already in the
i2c tree. The branch is available also on
git://git.antcom.de/linux-2.6.git lpc32xx/i2c
Roland Stigge <stigge@antcom.de> writes:
this is the series of the 4 patches adding device tree support to i2c-pnx
(used by LPC32xx) that Wolfram Sang already applied to the i2c subsystem.
Since both drivers/i2c/ and mach-lpc32xx are touched here, there will
probably be conflicts that you need to be aware of.
I'm posting this again for arm-soc since the actual mach-lpc32xx specific
DT conversion builds upon those changes (see next pull request), especially
in arch/arm/mach-lpc32xx/common.c.
Wolfram already gave permission to merge this via arm-soc, but please
coordinate and tell me if I can help resolving this.
Further, this implicitly updates the next/dt branch to v3.4-rc4, which
causes a trivial conflict from a change in one branch in code that
gets removed in another.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
This is a rebased version of parts of
git://git.stlinux.com/spear/linux-2.6.git spear-v3.5
which was accidentally based on the linux-next tree and mixed too
many different things. The pinctrl related changes from the same
branch are now in the spear/pinctrl branch of arm-soc.
There are a few non-DT cleanups mixed in here, but fundamentally
it's all related to the DT conversion.
* spear/dt: (9 commits)
ARM: spear: remove most mach/*.h header contents
SPEAr: Update defconfigs
SPEAr: Add PL080 DMA support for 3xx and 6xx
ARM: SPEAr3xx: Add device-tree support to SPEAr3xx architecture
SPEAr3xx: Replace printk() with pr_*()
SPEAr6xx: Add compilation support for dtbs using 'make dtbs'
SPEAr3xx: Add clock instance of usb hosts - ehci and ohci 0 and 1
SPEAr: Use CLKDEV_INIT for defining clk_lookups
ARM: SPEAr600: Change FSMC and SMI clock names
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
First part of DT changes for the Renesas shmobile platform,
pulled from:
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas.git dt
* renesas/dt:
ARM: mach-shmobile: sh7372 generic board support via DT V2
ARM: mach-shmobile: Rework sh7372 INTCS demuxer V2
ARM: mach-shmobile: Use INTC_IRQ_PINS_16H on sh7372
ARM: mach-shmobile: Use 0x3400 as INTCS vector offset
ARM: mach-shmobile: Introduce INTC_IRQ_PINS_16H
ARM: mach-shmobile: Introduce shmobile_setup_delay()
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: rebuilt branch due to drop of an early merge]
Signed-off-by: Olof Johansson <olof@lixom.net>
