This patch adds a working defconfig for the LPC32XX architecture. It is a
general default configuration for the PHY3250 reference board and others
based on LPC32XX.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Kevin Wells <kevin.wells@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adjusts the clock registration list, ported from the latest version
of Kevin Wells' latest version of clock.c: i2s0_ck, i2s1_ck and dev:mmc0 have
NULL pointers associated as the .dev_id and .con_id, respectively. The old
values were not useful.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Kevin Wells <kevin.wells@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch fixes the jiffies wrapping bug in clock.c.
It corrects the timeout computation based on jiffies, uses time_before() for
correct wrapping handling and replaces a binary "&" which should really be a
logical "&&" in a truth expression.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Tested-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Kevin Wells <kevin.wells@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch fixes a GCC compile error ("static declaration follows non-static
declaration") for LPC32XX's watchdog, removing the extern declaration since
it's not called externally.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Kevin Wells <kevin.wells@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch fixes the mutex issue in clock.c, as done in Kevin Wells' original
driver update:
In some cases, the clock drivers could grab a mutex twice in an improper
context. This patch changes the mutex mechanism to a simple irq lock/unlock
mechanism and removes un-needed locks from some functions.
(See also git.lpclinux.com)
Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Kevin Wells <kevin.wells@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds a working defconfig for the LPC32XX architecture. It is a
general default configuration for the PHY3250 reference board and others
based on LPC32XX.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Kevin Wells <kevin.wells@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Serial/TTY fixes for the 3.3-rc3 tree
Just a few new device ids, omap serial driver regression fixes, and a
build fix for the 8250 driver movement.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* tag 'tty-3.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
tty: serial: omap-serial: wakeup latency constraint is in microseconds, not milliseconds
tty: serial: OMAP: block idle while the UART is transferring data in PIO mode
tty: serial: OMAP: use a 1-byte RX FIFO threshold in PIO mode
m32r: relocate drivers back out of 8250 dir
tty: fix a build failure on sparc
serial: samsung: Add support for EXYNOS5250
serial: samsung: Add support for EXYNOS4212 and EXYNOS4412
drivers/tty/vt/vt_ioctl.c: fix KDFONTOP 32bit compatibility layer
Prevent OMAP UARTs from going idle while they are still transferring
data in PIO mode. This works around an oversight in the OMAP UART
hardware present in OMAP34xx and earlier: an idle UART won't send a
wakeup when the TX FIFO threshold is reached. This causes long delays
during data transmission when the MPU powerdomain enters a low-power
mode. The MPU interrupt controller is not able to respond to
interrupts when it's in a low-power state, so the TX buffer is not
refilled until another wakeup event occurs.
This fix changes the erratum i291 DMA idle workaround. Rather than
toggling between force-idle and no-idle, it will toggle between
smart-idle and no-idle. The important part of the workaround is the
no-idle part, so this shouldn't result in any change in behavior.
This fix should work on all OMAP UARTs. Future patches intended for
the 3.4 merge window will make this workaround conditional on a
"feature" flag, and will use the OMAP36xx+ TX event wakeup support.
Thanks to Kevin Hilman <khilman@ti.com> for mentioning the erratum i291
workaround, which led to the development of this approach.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Alan Cox <alan@linux.intel.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Govindraj.R <govindraj.raja@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The ARM kernel uses undefined instructions to implement
BUG/BUG_ON(). This leads to problems where people don't read one
line above the Oops message and see the "kernel BUG at ..."
message and so they wrongly assume the kernel has hit an
undefined instruction.
Instead of printing:
Internal error: Oops - undefined instruction: 0 [#1] PREEMPT SMP
print
Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
This should prevent people from thinking the BUG_ON was an
undefined instruction when it was actually intentional.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
armv7's flush_cache_all() flushes caches via set/way. To
determine the cache attributes (line size, number of sets,
etc.) the assembly first writes the CSSELR register to select a
cache level and then reads the CCSIDR register. The CSSELR register
is banked per-cpu and is used to determine which cache level CCSIDR
reads. If the task is migrated between when the CSSELR is written and
the CCSIDR is read the CCSIDR value may be for an unexpected cache
level (for example L1 instead of L2) and incorrect cache flushing
could occur.
Disable interrupts across the write and read so that the correct
cache attributes are read and used for the cache flushing
routine. We disable interrupts instead of disabling preemption
because the critical section is only 3 instructions and we want
to call v7_dcache_flush_all from __v7_setup which doesn't have a
full kernel stack with a struct thread_info.
This fixes a problem we see in scm_call() when flush_cache_all()
is called from preemptible context and sometimes the L2 cache is
not properly flushed out.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
With an admittedly exotic choice of configuration options
(CC_OPTIMIZE_FOR_SIZE, THUMB2, some other size-minimizing ones)
and compiler, the proc_info table can end up being misaligned,
and the kernel being unbootable (Error: unrecognized/unsupported
processor variant).
Forcing the alignement to 4 bytes in the linker script fixes the
issue.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Change the sa1111 device id to be a bitmask. This allows us to
specify the actual device, while allowing a single driver to bind
to both PS2 devices.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the handling of the 5v supply into badge4.c, removing this board
specific detail from the sa1111 ohci driver.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add platform hooks to be called when individual sa1111 devices are
enabled and disabled. This will allow us to move some platform
specifics out of the individual drivers.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add a shutdown hook to the sa1111_driver structure to allow drivers
to be notified of system reboots and shutdowns.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Implement the necessary allocation/freeing functionality to support
sparse IRQs with the SA-1111 device. On non-sparse IRQ platforms,
this allows us to dynamically allocate from within the available IRQ
number space.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit 19851c58e6 (sa1111: allow cascaded IRQs to be used by platforms)
moved the IRQ definitions to the .c file, and added an irq_base member
to the private data structure.
The inerrupt demultiplexer uses irq_base, but the interrupt setup code
does not. Also, although the commit adds a private data structure to
pass this data, it isn't even referenced, resulting in irq_base being
zero.
We also copied the IRQ numbers from the device info array into the actual
devices, resulting in wrong interrupt numbers passed to the sub-devices.
The net effect of this is that we always overwrite IRQs 0-54, even if
they are allocated elsewhere in the system.
Add the code necessary to setup the private irq_base, and use it in the
IRQ setup code. Make the SA-1111 probe fail with -EINVAL if there is no
platform data provided.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We should not write to the SA1111 registers after setting the SLEEP
bit. Moreover, the manual says that the PWM registers should be
disabled before we enter sleep. So, move the clearing of these
registers earlier in the suspend sequence.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We weren't re-enabling the memory request/grant signals on resume,
causing DMA devices on the sa1111 to fail.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Now that we ioremap() the neponset register space, there's no need
to static map the neponset registers. Get rid of this static mapping.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the board specific neponset register definitions to the board
file, rather than mach/neponset.h. However, as the NCR_0 register
definitions are used by some drivers, leave these behind.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The neponset board is a daughter board for the Assabet. Create the
neponset platform device in assabet.c, where we don't have to wrap
it with machine_is_assabet() stuff. We also create this device
dynamically rather than keeping it as a static device.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Suspend and resume in the _noirq state, so that we're saving the
state of the modem control signals as late as possible, and restoring
them as early as possible. There's nothing to do in thaw/poweroff
methods as we've already saved the necessary state.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Complete the neponset device resources by covering the children's
memory resources in the parent neponset device.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Obtain the parent IRQ from the neponset device resource rather than
hard-coding it into the code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Implement the necessary allocation/freeing functionality to support
sparse IRQs with the Neponset device. On non-sparse IRQ platforms,
this allows us to dynamically allocate from within the available IRQ
number space.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Use platform_device_register_full() to dynamically create the various
neponset child platform devices, and place them below the neponset
device itself to ensure proper PM ordering and device structure.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Save and restore the modem output control register across a suspend/
resume, as well as the NCR register. Place these in a locally
allocated data structure rather than needing a new static variable.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than having direct register accesses to NCR_0 scattered amongst
the code, provide a function instead. This contains the necessary
race protection for this platform, ensuring that updates to this
register are safe.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since ARM was converted to genirq, the neponset IRQ implementation has
gradually broken as a result of various subtle changes being introduced
into genirq.
It used to be that simple IRQs did not need an IRQ chip. This is no
longer the case, and genirq barfs in irq_set_handler(). Fix this by
introducing a dummy no-op chip, and registering it along with the flow
handler.
Neponset IRQs really don't have any masking ability - all we have is a
status register to allow us to decode the source, and a three input OR
gate inside a CPLD.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
GPIO27 is just connected to a CPLD input without any pull-ups or pull-
downs. If GPIO27 is left as an input, it will float around mid-supply,
which for CMOS inputs is the worst place for a pin to be. Ensure that
this pin is driven.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid glitching the GPIO signals during initialization, which can
have undesirable effects. Ensure that the desired pin state is set
before we change the GPIO pin direction to be an output.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Neponset calls sa1110_mb_disable() from __devinit code, but
sa1110_mb_disable() is marked __init, and so causes a section
mismatch warning.
As sa1110_mb_enable() and sa1110_mb_disable() need to be callable
from suspend/resume paths as well, they must not be marked __init
or __devinit.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Sometimes, we get stuck while trying to enter sleep. This seems
to occur if we do not have udelay() in the instruction cache. Avoid
this by requesting a short delay prior to modifying the SDRAM timings.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Hackkit defined its flash memory resource to be 32M + 1 byte.
Jornada defined the Epson video controller resources to be one byte
larger than they should be, and mis-mapped the SA-1111 companion
chip one byte smaller than it should be.
Fix these.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit db0d4db22a ('ARM: gic: allow GIC to support non-banked setups)
requires a cpu-offset property to be specified for non-banked gic
controllers, which is the case for Exynos4.
Reported-and-Tested-by: Karol Lewandowski <k.lewandowsk@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit brings exynos4-dt in line with recent changes to
mach-exynos tree, specifically:
- Fixes build break related to replacing plat/exynos4.h with
common.h in commit cc511b8d84 ("ARM: 7257/1: EXYNOS:
introduce arch/arm/mach-exynos/common.[ch]")
- Converts machine to use CONFIG_MULTI_IRQ_HANDLER as done for
other machines in commit 4e44d2cb95 ("ARM: exynos4: convert
to CONFIG_MULTI_IRQ_HANDLER")
- Adds restart specifier as done for other machines in commit
9eb4859564 ("ARM: 7262/1: restart: EXYNOS: use new restart hook")
Signed-off-by: Karol Lewandowski <k.lewandowsk@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
